臺灣博碩士論文加值系統

本研究用VHDL硬體描述語言，做精簡指令集MIPS CPU設計為主體，
經模擬(Simulation)完成之CPU電路下載至FPGA(Field Programmable Gate
Array)，加入I/O介面控制電路設計，再與I/O電路實體連接，以完成整體設
計架構，並發展部分實作教材，可供教師在計算機組織與設計相關科目之
教學參考。CPU與I/O介面控制電路之設計與規劃，是計算機組織與設計課
程之重點。
目前相關之“計算機組織與設計”教科書僅止於對設計概念與控制流程
作介紹，本研究進一步將其設計理念與流程控制作成電路，且在FPGA之
實驗平台作驗證，讓CPU設計從構想、設計至實際電路製作能一氣呵成。
學生藉由這些相關單元的學習，不僅能了解CPU內部架構與資料流向和控
制，且能結合外部相關硬體電路的模組設計，充實本身對計算機硬體設計
之知能。
VHDL為業界經常使用於電路設計之工具軟體，MIPS CPU亦是業界主
流的microcontroller之一，讓學生及早並熟悉這些工具來設計實用的CPU，
將更進一步縮短教育界與產業界之技術差距。
本研究除此上述目標之外，參考相關學術文獻、技術文件，發展教學
及部分實作教材，並設計符合研究所需之FPGA實驗平台，以幫助設計成
品之驗證與實作需要。期能以由淺入深的教學與實作歷程，提供教師在相
關計算機組織與設計教學的參考。

This research used VHDL to design a MIPS-like CPU and the related I/O
interface as well as device driver circuits. They were downloaded to a FPGA
platform for various function verifications. Most textbooks about “computer
architecture and design” are concerned with the instruction to the design
concepts and design flows, no practical circuit design and implementation are
involved, partially due to their large complicated circuitries. This research
offers such practical design and circuit implementation to make the design
concepts from textbooks become some realized products.
VHDL is a popular hardware design tool used in industries. MIPS CPU is
also a microcontroller extensively used for many applications in industries.
Students use popular design tool to design a practical CPU in industries would
truly decrease the technical gaps between schools and industries.
The VHDL circuit design procedure, synthesis, and FPGA chip
implementations were listed in the appendixes. The FPGA hardware circuit
board design and I/O device interface were also described steps by steps. They
might be offered as some references for teaching the course concerning
“computer architecture and design”.

謝誌....................................................................................................................I
中文摘要............................................................................................................ II
ABSTRACT...................................................................................................... III
目錄...............................................................................................................IV
圖目錄...............................................................................................................VI
表目錄...............................................................................................................IX
第一章緒論....................................................................................................... 1
第一節研究背景與動機.............................................................................. 1
第二節研究目的與問題.............................................................................. 5
第三節研究方法與步驟.............................................................................. 7
第四節研究範圍與限制.............................................................................. 9
第五節名詞解釋........................................................................................ 10
第二章文獻探討............................................................................................. 13
第一節大專院校電機電子群專業能力分析探討.................................... 13
第二節HDL 硬體描述語言....................................................................... 14
第三節計算機組織與設計教學相關文獻................................................ 17
第三章MIPS CPU 規劃設計.......................................................................... 25
第一節MIPS CPU 相關知識..................................................................... 25
第二節MIPS CPU 模組規劃..................................................................... 30
第四章MIPS CPU 模組設計.......................................................................... 35
第一節資料路徑........................................................................................ 35
第二節控制單元........................................................................................ 40
第五章I/O 介面控制模組規劃與設計........................................................... 45
第一節輸入單元模組................................................................................ 45
第二節輸出單元模組................................................................................ 47
第六章實驗平台規劃及系統測試................................................................. 51
第一節實驗平台規劃................................................................................ 51
第二節系統測試........................................................................................ 52
第七章結論與建議......................................................................................... 57
第一節結論................................................................................................ 57
第二節建議................................................................................................ 57
參考文獻........................................................................................................... 59
附錄A MIPS CPU 指令集格式.................................................................... 63
附錄B MIPS CPU 設計及I/O 控制之教學與實作範例教材................... 65
附錄C FPGA 實驗平台實體圖.................................................................. 121

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