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研究生:張飛明
研究生(外文):Fei-Ming Chang
論文名稱:5.2GHz超低功率背閘極耦合正交壓控振盪器
論文名稱(外文):5.2GHz VERY LOW POWER QVCO WITH BACK-GATE COUPLING
指導教授:蔡明傑蔡明傑引用關係
學位類別:碩士
校院名稱:大同大學
系所名稱:電機工程學系(所)
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:英文
論文頁數:67
中文關鍵詞:壓控振盪器
外文關鍵詞:VCO
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摘 要
本篇論文旨在設計一全新架構之正交電壓控制振盪器,其利用新型仍保有電流再利用優點之半互補交叉耦合對的架構,搭配上背閘極耦合的觀念,將互補式四相位兩組耦合壓控振盪器所需要的十六個晶體數目減少為四個,並且有效的將消耗功率及相位雜訊降至最低。在模擬及LAYOUT的過程中皆是利用台積電所提供的0.18μm 1P6M CMOS model 來完成。在消耗功率僅2.86mW情況下,此四相位壓控振盪器工作於5.28GHz得到相位雜訊-117.758 dBc/Hz @ 1M offset。
ABSTRACT
This research mainly focuses on the design of a novel QVCO with properties of low power, low phase noise & compact size. The new topology consists of the semi-complementary cross-coupled pair with advantage of DC re-use and a concept of back-gate coupling, where the back-gates of the core transistors are used as coupling terminals. Through this topology, the 16 transistors of a complementary differential QVCO can be reduced to 4, as well as the decrease of power dissipation and additional noise contribution. A QVCO based on the proposed topology is implemented with TSMC 0.18 μm technology for 5.28G operation and measurement shows the phase noise of -117.758 dBc / Hz @ 1MHz offset with power consumption only 2.86 mW.
TABLE OF CONTENTS
CHINESE ABSTRACT i
ENGLISH ABSTRACT ii
ACKNOWLEDGEMENTS iii
TABLE OF CONTENTS iv
LIST OF FIGURES vii
LIST OF TABLES xi
CHAPTER
1 INTRODUCTION 1
1.1Background 1
1.2 Research Motive 3
1.3 Research Framework 7
2 REVIEW OF TRANSCEIVERS 8
2.1 Transmitters 8
2.1.1 Direct-Conversion Transmitters 9
2.1.2 Two-Step Transmitters 10
2.1.3 Modulation Loop Transmitters 11
2.2 Receivers 12
2.2.1 Super-Heterodyne Receivers 12
2.2.2 Image Rejection Receivers 16
2.2.3 Direct Conversion Receivers 18
3 PRINCIPLE OF OSCILLATORS 20
3.1 LC Resonance 20
3.2 Oscillator Models 22
3.3 Types of Oscillators 25
3.3.1 Resonatorless Oscillators 26
3.3.1.1 Ring Oscillator 26
3.3.1.2 Relaxiation Oscillators 27
3.3.2 Resonator Oscillators 29
3.4 LC-Tank Differential VCO Topologies 31
3.4.1 Cross-Coupled Differential Topology 32
3.4.2 NMOS or PMOS Cross-Coupled Differential Topology 33
3.4.3 CMOS Core Cross-Coupled Differential Topology 34
4 REALIZATION OF PROPOSED QVCO 38
4.1 Quadrature Oscillators 38
4.1.1 Inphase Coupling 40
4.1.2 Antiphase Coupling 42
4.2 Back-Gate Coupling 44
4.3 Semi-Complementary Cross-Coupled Pair 49
4.4 Elements Models 51
4.4.1 Spiral inductor model 51
4.4.2 MOS model 53
4.4.3 Junction varactor model 54
4.5 Simulation results 55
4.5.1 Circuit implementation 55
4.5.2 Simulation results 58
4.5.3 Comparison of performance with prior works 60
4.5.4 Layout 61
5 CONCLUSION 63
REFERENCES 65
REFERENCES

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