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研究生:林振誠
研究生(外文):Cheng-Chen Lin
論文名稱:離散小波轉換與係數編碼之新穎架構及硬體設計
論文名稱(外文):Novel Architecture and Hardware Designs for Discrete Wavelet Transform and Coefficient Coding
指導教授:黃穎聰黃穎聰引用關係
指導教授(外文):Yin-Tsung Hwang
學位類別:碩士
校院名稱:國立雲林科技大學
系所名稱:電子與資訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2005
畢業學年度:93
語文別:中文
論文頁數:109
中文關鍵詞:離散小波轉換係數編碼影像壓縮
外文關鍵詞:DWTCoefficient Coding
相關次數:
  • 被引用被引用:1
  • 點閱點閱:149
  • 評分評分:
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:2
離散小波轉換已經在影像壓縮上有非常好的效果,所以成為許多的影像視訊標準。在本篇論文中,我們提出新穎的一維、二維與三維上提式離散小波轉換的VLSI 架構。我們利用上提式架構及係數折疊技術,實現一維、二維與三維的架構。架構上我們以一維架構延伸到二維,再由二維架構延伸到三維,因此與傳統相比較我們的架構有更好的擴展性。與不同的一維、二維及三維離散小波轉換架構做比較,所提出的架構優點在於100%硬體使用效率、快速計算時間、最少的記憶體需求、規則的資料流與低控制複雜度。在二維與三維離散小波轉換之後,我們利用Zero Tree Coding做頻域編碼,並且將輸出的bit-stream再做一次AAC的資料壓縮,可以達到良好的壓縮效果。最後則將其硬體實現在ARM Integrator上的 FPGA Board中,並搭配其CMOS與VGA Display來作為影像的輸入與輸出裝置,此架構可以達到5~20倍的壓縮倍率,畫面的解析度為320x240,而每秒可以處理約5~7張畫面,可應用在靜態影像壓縮、視訊壓縮、監視系統等等。
DWT has been found very useful in video compression. It was adopted in various standards for image and video compression. In this thesis, we propose novel VLSI architectures and implement 1-D, 2-D, and 3-D lifting-based discrete wavelet transform (DWT). We employ the lifting-based architecture and apply the coefficient folding techniques to implement 1-D, 2-D, and 3-D architectures. We also extend 1-D architecture to 2-D and then to 3-D. Therefore, our architecture has better extension than traditional designs. In comparison with other 1-D, 2-D and 3-D DWT architectures, the advantages of the proposed architecture are 100% hardware utilization, fast computing time, the least amount of memory, regular data flow, and low control complexity. Based on the proposed DWT architectures, we devise a low complexity video coding system. The system starts with 2-D/3-D DWT. After applying 2-D and 3-D DWT, We use Zero Tree Coding to encode (compress) the DWT coefficients. The resultant bit stream is for the compressed by AAC. The system can achieve reasonably good compression result. Finally, the hardware design is implemented in an ARM based FPGA prototyping board, which includes CMOS and VGA card for image acquirement and display. This system can obtain 5 ~ 20 times of compression ratio. The picture resolution is 320 x 240, and the system can process about 5 ~ 7 frames per second. It can be equally applied to still image compression, video compression, the surveillance system, and so on.
摘 要 .................................................................. I
ABSTRACT .................................................................. II
誌 謝 .................................................................. III
目 錄 .................................................................. IV
表目錄 .................................................................. VII
圖目錄 .................................................................. IX
第一章 緒論 ............................................................ 1
1.1 前言 ............................................................ 1
1.2 研究動機與目的 ................................................... 2
1.3 章節概述 ......................................................... 3
第二章 小波轉換 ......................................................... 4
2.1 小波轉換理論簡介 ................................................. 4
2.2 離散小波轉換 (Discrete Wavelet Transform) ........................ 6
2.3 傳統式小波轉換 ................................................... 8
2.4 上提式小波轉換 ................................................... 9
2.5 Lifting Theorem .................................................. 10
第三章 相關的離散小波轉換架構 ............................................ 14
3.1 一維離散小波轉換 ................................................. 14
3.2 一維離散小波轉換硬體架構 ......................................... 15
3.2.1 平行濾波器架構(Parallel Filter Architecture) ............... 15
3.2.2 平行字元架構(Word-parallel Architecture) ................... 16
3.2.3 二級係數摺疊式架構(Two-Stage Coefficient Folding Architecture)16
3.2.4 Systolic Array 架構 ........................................ 17
3.2.5 Semi-Systolic Array 架構 ................................... 18
3.2.6 RAM Based 架構 ............................................. 18
3.2.7 遞迴架構(Recursive Architectures) .......................... 19
3.2.8 兩倍的掃描架構(Dual Scan Architectures) .................... 19
3.3 二維離散小波轉換 ................................................. 20
3.3.1 分離式處理(Separable) ...................................... 20
3.3.2 非分離式處理(Non-Separable) ................................ 21
3.4 二維離散小波轉換架構 ............................................. 22
3.4.1 直接式架構(Direct Approach) ................................ 22
3.4.2 並列式架構(Parallel-Parallel Architecture) ................. 23
3.4.3 Polyphase-Folded 架構 ...................................... 24
3.4.4 平行濾波器架構(Parallel Filter Architecture) ............... 25
3.4.5 遞迴架構(Recursive Architectures) .......................... 26
3.4.6 兩倍的掃描架構(Dual Scan Architectures) .................... 27
3.5 三維離散小波轉換架構 ............................................. 28
3.5.1 三維離散小波一型架構 ....................................... 28
3.5.2 三維離散小波二型架構 ....................................... 28
3.6 架構效能比較 ..................................................... 29
第四章 雙輸入Z掃描之上提式離散小波轉換架構 ............................... 30
4.1 一維上提式離散小波轉換架構 ....................................... 30
4.2 二維雙輸入Z掃描上提式離散小波轉換架構 ............................ 31
4.3 三維雙輸入Z掃描上提式離散小波轉換架構 ............................ 37
4.4 精確度分析 ....................................................... 40
4.4.1 內部資料最大值和最小值分析 ................................. 41
4.4.2 濾波器係數分析 ............................................. 41
4.4.3 DWT 係數分析 ............................................... 44
4.5 邊緣處理 ......................................................... 45
4.6 最佳化處理單元 ................................................... 47
4.6.1 Multiplier–based .......................................... 47
4.6.2 Shift-Add Operations ....................................... 47
第五章 離散小波轉換架構比較 .............................................. 49
5.1運算時間 .......................................................... 49
5.1.1 一維上提式離散小波轉換運算時間 ............................. 49
5.1.2 二維上提式離散小波轉換運算時間 ............................. 49
5.1.3 三維上提式離散小波轉換運算時間 ............................. 50
5.2記憶體需求 ........................................................ 51
5.2.1 一維上提式離散小波轉換記憶體需求 ........................... 51
5.2.2 二維上提式離散小波轉換記憶體需求 ........................... 51
5.2.3 三維上提式離散小波轉換記憶體需求 ........................... 52
5.3 架構的效能比較 ................................................... 54
5.3.1 一維效能比較 ............................................... 54
5.3.2 二維效能比較 ............................................... 55
5.3.3 三維效能比較 ............................................... 56
第六章 資料壓縮法 ....................................................... 59
6.1 算術編碼法(Arithmetic Coding) .................................. 59
6.2 Q-coder .......................................................... 62
6.3 適應性二元算術編碼法(Adaptive Binary Arithmetic Coding) ........ 64
6.4 形狀適應零樹編碼法(Shape Adaptive-Zero tree coding) .............. 67
6.4.1 零樹編碼(Zero tree coding) .................................. 67
6.4.2 形狀適應零樹編碼演算法 ..................................... 70
6.4.3 三維形狀適應零樹編碼 ....................................... 71
第七章 動態影像壓縮之硬體設計與實現 ..................................... 73
7.1 CMOS Sensor硬體架構 .............................................. 73
7.2 VGA硬體架構 ...................................................... 75
7.3 DWT硬體架構 ...................................................... 78
7.4 SA-ZTC 硬體架構 .................................................. 82
7.4.1 2-D ZTC 編碼架構設計 ....................................... 82
7.4.2 2-D ZTC解碼架構設計 ........................................ 83
7.4.3 對稱性 3D ZTC CODEC ........................................ 84
7.5 AAC 硬體架構 ..................................................... 86
7.6 整合系統設計 ..................................................... 89
第八章 結論與未來發展 ..................................................... 91
參考文獻 ................................................................. 92
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