臺灣博碩士論文加值系統

在一個大型的嵌入式系統之中，記憶體伴演著最主要的成本、必v消耗與工作效率之瓶頸。因此，系統設計師往往付出大量心力在於設計記憶體架構。傳統上，一般在於可程式系統之中的記憶體架構大多利用階層式快取記憶體(cache hierarchy)，處理器與記憶體之間越來越大的隔閡以至於針對特殊應用對於不同的記憶體設計之需要。在多媒體應用之中，對於單晶片外部與內部之記憶體資料搬移這些基本操作普遍存在於其應用之中。換言之，在於多媒體應用上之效能跟記憶體的存取與資料計算的隔閡有著緊密的關係。因為一連串的記憶體存取必須花費釵h資源且需要大量時間停頓處理器的執行使得資料搬移問題對於記憶體潛伏時間(memory latency)之惡化。釵h隱藏記憶體潛伏時間(memory latency hiding)技術被研究來使得可以同時進行多個記憶體存取，但都沒有對指定記憶體位置之搬移加以探討。在這篇論文之中，我們提出了兩個主要的想法：(1)資料之傳遞、(2)善用快取記憶體，以此加以提出相關之在於多媒體應用之記憶體存取花費之最佳化問題，並基於VisoMT UniCore架構上實作出雙埠快取記憶體、非阻擋式資料快取記憶體、以及可程式化背景存取記憶體機器，以證明其想法對於減少記憶體存取之花費的可行性。

Memory represents a major cost, power, and performance bottleneck for a large class of embedded systems. Thus, system designers pay great attention to the design and tuning of the memory architecture early in the design process. While traditional memory architecture for programmable systems was organized as a cache hierarchy, the widening processor/memory performance gap requires more aggressive use of memory configurations, customized for the specific target applications. Data movement between off-chip memory and on-chip memory is a basic primitive operation which is commonly executed by multimedia applications. The performance of these applications is known to be heavily dependent on the extent to which the memory accesses are overlapped by useful computation. The data movement problem exacerbates the memory latency problem since it requires a train of memory accesses, consuming most of the resources and stalls the CPU for a long period of time. Several memory latency hiding techniques that have been investigated apply well to one or a few simultaneous memory accesses, but do not address-based data movement scenario. In this thesis, we bring up the two major consideration: (1) data transferring and (2) cache utilization to optimize the memory access overhead in multimedia application problem and implement the dual-ported cache, non-blocking data cache, and a programmable background load/store machine on a VisoMT UniCore architecture to reduce the memory access times and hide the memory latency which optimize the memory overhead.

1. Introduction and Motivation
2. Related Work
3. Reducing Memory Access Overhead for Multimedia Application
4. Implementation
5. Experiment and Performance Evaluation
6. Conclusion

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