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研究生:雀陶
研究生(外文):Yun-Kai Hsu
論文名稱:一個在現場可程式化閘陣列上實現重複使用數位多層細胞式類神經網路的方法
論文名稱(外文):Implementation of Reusable Digital Multi-Layer Cellular Neural Network on FPGA
指導教授:余松年余松年引用關係
指導教授(外文):Sung-Nien Yu
學位類別:碩士
校院名稱:國立中正大學
系所名稱:電機工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
畢業學年度:94
語文別:中文
論文頁數:91
中文關鍵詞:現場可程式化閘陣列多層細胞式類神經網路重複使用
外文關鍵詞:FPGACNNReusablemulti-layer Cellular Neural Network
相關次數:
  • 被引用被引用:1
  • 點閱點閱:218
  • 評分評分:
  • 下載下載:34
  • 收藏至我的研究室書目清單書目收藏:0
目前細胞式類神經網路(Cellular Neural Networks, CNN)的趨勢漸漸往大型模板以及多層架構應用方向發展,但是傳統的CNN-UM受限於其硬體架構並不易使用於大型模板以及多層架構的應用,所以本論文提出一個可重複使用的多層細胞式類神經網路架構,並加入模板分解弁遄C本架構使用硬體直接存取記憶體的方式來加快速度,再搭配一顆CPU來進行相關控制,並建立一個嵌入式系統來使我們的系統更加完善。
  在本論文所提出的可重覆使用多層細胞式類神經網路中,我們設計了一個視窗程式讓使用者可以根據所需的弁鄖荈i行相關設定,程式會根據所設定的架構來產生所需的Verilog程式碼。如此一來,我們的架構可以適用於大多數的多層架構。另外我們在架構中加入大型模板分解的特性,更加擴大我們架構的應用範圍。
  本研究使用了Xilinx Multimedia Board來驗證我們的架構的正確性,論文中舉了兩個例子來驗證,實驗過程顯示只需更改視窗程式的設定即可產生一組Veriolg程式碼來使用於不同應用。執行結果顯示硬體運算得到的結果與軟體運算得到的結果之間誤差約在0.0076%~1.0254%,證明我們的架構是正確無誤,並且可以重複使用。
  本研究可以應用在於一些複雜狀態程式的多層CNN應用中,目前我們的架構最高可以支援到16層,並可以支援大型模板應用,且有視窗程式可以分別定義各層的參數以及各層間的關係參數。相信本架構的提出將可大幅提升多層細胞式類神經網路硬體實現的弁鄔吤H及便利性。
The trend of study in the Cellular Neural Networks(CNN) has gone toward the field of large template and multi-layer structure. However traditional CNN-UM is limited to its hardware structure that is difficult to used in the application of large template and multi-layer structure. Therefore, the objective of this thesis is to propose a reusable multi-layer CNN structure which also support large template decomposition function. This structure uses the method of direct memory access to accelerate the processing and uses a CPU core for control. Both of these features result in an effective embedded system.
In our proposed system, we design a GUI (Graphical User Interface) and enable users to set the parameters for specific purpose. The GUI will automatically produce the Verilog code according to the settings. Therefore, the system can support most multi-layer structures. In addition, we add the function of large template decomposition, which further expands the range of application of our system.
This research uses a Xilinx Multimedia Board to verify the performance of our system. Two examples are designed to verify the results. The experimental results show that different applications can be properly reproduced by only changing the settings of the GUI, which further produces the Verilog code for different applications. The results show negligible differences of about 0.0076%~1.0254% between hardware operation and software operation. This result proves the effectiveness and reusability of our system.
This system can be used in the application of multi-layer CNN that has complex state functions. Our system can support multi-layer CNN up to 16 layers and allows large template decomposition. A user friendly GUI is designed to separately set the parameter of each layer. It is believed that the proposition of this structure can improve the functionality and convenience in the hardware implementation of multi-layer cellular neural network hardware.
摘要............................................................................................. i
章節目錄................................................................................... iv
第一章、緒論............................................................................ 1
1.1、研究背景與動機.........................................................................1
1.2、研究目的.....................................................................................2
1.3、論文架構.....................................................................................2
第二章、相關文獻回顧............................................................ 4
2.1、細胞式類神經網路.....................................................................4
2.1.1、細胞式類神經網路架構....................................................................4
2.1.2、離散細胞式類神經網路....................................................................7
2.2、細胞式類神經網路硬體實現....................................................8
2.3、大型模板分解...........................................................................12
2.3.1、Slot 模板拆解理論..........................................................................12
2.3.2、模板拆解之改良..............................................................................13
2.3.3 近年來對模板分之研究....................................................................13
2.4、多層細胞式類神經網路相關研究..........................................14
第三章、多層細胞式類神經網路架構.................................. 17
3.1、大型模板拆解...........................................................................17
3.2、單層細胞式類神經網路硬體架構..........................................20
3.3、多層細胞式類神經網路架構..................................................24
3.3.1、單一多層細胞式類神經網路架構介紹..........................................24
3.3.2、多層細胞式類神經網路架構..........................................................26
第四章、可重複使用多層細胞式類神經網路架構............... 31
4.1、可自訂規劃以重複使用架構..................................................31
v
4.2、可設定弁?.............................................................................33
第五章、嵌入式系統架構...................................................... 36
5.1、嵌入式系統簡介.......................................................................36
5.2、FPGA 簡介...............................................................................39
5.3、Xilinx Multimedia Board..........................................................40
5.4、驗證環境...................................................................................43
5.4.1、系統架構..........................................................................................43
5.4.2、控制暫存器介紹..............................................................................44
5.4.3、驗證流程..........................................................................................46
第六章、實驗結果與討論...................................................... 48
6.1、類似視網膜行為驗證...............................................................49
6.2、線的連接驗證...........................................................................58
第七章、結論.......................................................................... 79
參考文獻.................................................................................. 80
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