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研究生:姜瑾嶧
研究生(外文):Chin-yi Chiang
論文名稱:MIMO-OFDM無線區域網路基頻傳送端硬體架構設計與實作
論文名稱(外文):Design and Implementation of the Baseband Transmitter for MIMO-OFDM Wireless Local Area Network
指導教授:劉宗憲劉宗憲引用關係
指導教授(外文):Tsung-Hsien Liu
學位類別:碩士
校院名稱:國立中正大學
系所名稱:通訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:59
中文關鍵詞:多輸入多輸出正交分頻多工可程式邏輯陣列基頻傳送端
外文關鍵詞:Baseband transmitterFPGAMIMOOFDM
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隨著無線網路的發展,高速無線區域網路的需求不斷的增加。目前IEEE 802.11a/g使用OFDM的技術,可以將資料傳輸率提升到54 MHz,未來多輸入多輸出技術MIMO將結合OFDM技術來增加更高的傳輸速率。本論文以EWC HT PHY Specification第1.27版為基礎,使用可程式陣列邏輯(Field Programmable Gate Array, FPGA)來實現2x2的MIMO-OFDM基頻傳送端電路。本論文使用一套電路的作法,利用電路的切換來產生兩根天線的信號,與兩套電路的作法來比較,僅需兩套電路的71% gate count即可完成。然而,此種設計方式與兩套電路比較,需要使用兩倍的工作頻率。
With the development of wireless communications,
the demand for high speed wireless local area network (WLAN) increases.
The current IEEE 802.11a/g can provide data rate up to 54 Mbps by using the orthogonal frequency division multiplexing (OFDM) technique.
In the near future, the multiple input multiple output (MIMO) technique will be combined with the OFDM technique to provide higher data rate transmission. In this thesis, based on the EWC HT PHY Specification version 1.27, a baseband transmitter for the 2-by-2 MIMO-OFDM system is implemented using field programmable gate array (FPGA). The designed baseband transmitter uses one circuit to generate signals for the two transmit antennas. Hence, the designed circuit needs 71% gate count of that needed by the direct circuits that generate two transmit signals in parallel. However, the working frequency that this design needs is doubled.
1. 導論
1.1 無線區域網路發展概況
1.2 研究動機
1.3 論文綱要

2. MIMO-OFDM 規格介紹
2.1 MIMO-OFDM PLCP 訊框格式
2.1.1 Legacy Short Training Field, L-STF
2.1.2 Legacy Long Training Field, L-LTF
2.1.3 Legacy Signal Field, L-SIG
2.1.4 High Throughput Signal Field, HT-SIG
2.1.5 High Throughput Short Training Field, HT-STF
2.1.6 High Throughput Long Training Field, HT-LTF
2.1.7 Data Field
2.2 MIMO-OFDM 實體層架構
2.2.1 攪拌器 (Scrambler)
2.2.2 迴旋積編碼器 (Convolutional Encoder)
2.2.3 Puncture
2.2.4 交錯器 (Interleaver)
2.2.5 子載波調變 (Subcarriers Mapping)
2.2.6 引領子載波 (Pilot Subcarriers)
2.2.7 反快速傅利葉轉換 (Inverse Fast Fourier Transform, IFFT)

3. MIMO-OFDM WLAN 基頻傳送端電路設計
3.1 硬體設計考量
3.2 MIMO-OFDM 基頻傳送端電路設計
3.2.1 Signal Generator and Scrambler Module
3.2.2 Convolutional Encoder and Puncture
3.2.3 Interleaving, Mapping, and Pilot-insertion
3.2.4 IFFT, add Guard Interval and Preabmle Generator
3.2.5 Symbol Number and Pad Bits Calculator
3.2.6 Control Unit at TX side
3.2.7 Synthesis Result

4. 結論與未來工作

Reference

中英名詞對照表
[1] IEEE 802.11, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications. IEEE Std 802.11, 1999.
[2] IEEE 802.11a, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High-speed Physical Layer in the 5 GHz Band. IEEE Std 802.11a, 1999.
[3] EWC HT PHY Specification, avaliable,
http://www.enhancedwirelessconsortium.org/home/EWC_PHY_spec_V127.pdf
[4] H. Heiskala, and J. T. Terry, OFDM Wireless LANs : A Theoretical and Practical Guide. Sams Publishing, 2002.
[5] J. G. Proakis, Digital Communications, 4th ed. New York: McGraw-Hill, 2001.
[6] Xilinx Inc. online technical documentation for "Complete Data Sheet for Virtex-II Platform FPGAs", http://directx.xilinx.com/bvdocs/publications/ds031.pdf
[7] Y. Tang, L. Qian, and Y. Wang, "Optimized software implementation of a full-rate IEEE 802.11a compliant digital baseband transmitter on a digital signal processor," in Proc. Global Commun. Conf. vol. 4, Dec. 2005, pp. 2194-2198.
[8] M. C. Chen, Design of 802.11a Baseband Transmitter and Synchronization. Master Thesis National Chiao Tung University, 2003.
[9] Y. H. Lin, Design and Implementation of Pulse Shaping, Digital and Analog Converters, and Timing Estimation Circuits for the IEEE 802.11a Baseband Transceiver. Master Thesis National Chung Cheng University. 2004.
[10] C. Y. Chang, Studies of the Baseband Transmitter and PAPR Reduction Techniques for the IEEE 802.11a System. Master Thesis National Chung Cheng University. 2005.
[11] A. V. Oppenhheim and R. W. Schafer, Discrete-Time Signal Processing, 2nd ed. Prentice-Hill, 1999.
[12] B. O'Hara and A. Petrick, IEEE 802.11 Handbook - A Designer's Companion. IEEE Press, 1999.
[13] 鄭信源,Verilog 硬體描述語言數位電路實務設計。儒林圖書,2003。
[14] 簡弘倫,Verilog 晶片設計 - 使用 ModelSim。文魁資訊,2005年6月。
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