臺灣博碩士論文加值系統

生醫訊號系統電路中，類比數位轉換器(ADC)，扮演將連續類比生理信號轉換為可處理數位信號的重要工作，數位信號再依使用需求做分析與處理統計，也是因為ADC在系統電路中操作使用頻繁，所以ADC電路設計中功率消耗大小就成為重要的考量因素。
本論文主要針對生醫訊號中波形特性，透過數位類比轉換器(DAC)使用電荷回收(Charge Recycle)方法，可以讓電路工作在低輸入電壓時電荷有效的回收利用，有效完成降低DAC電路消耗能量。
因應生醫訊號應用，因此對電路的準確度與解析度相當程度的要求，為了ADC可以正確轉換避免過程中受到誤差而轉換錯誤，論文中設計使用互補式信號產生電路與多級偏壓消除電路來增加電路準確度與線性度，目的都為改善電路誤差影響。
此外，比較器電路負責比較輸入電壓與DAC參考電壓，本論文實現工作電壓在一伏特全輸入擺幅輸入，利用CDB(Current Driven Bulk)來降低臨界電壓值，達到一伏特全擺幅輸入放大器。
本論文ADC電路實現工作於一伏特環境下，平均功率為32.5uw，應用心電訊號下平均功率為29.5uw可再減少9%能量損耗，靜態特性DNL≦0.25LSB、INL≦0.45LSB、SNR=58dB有效位元9.4位元的結果。

In a biomedical signal processing system, an ADC is an important circuit that successively converts analog biomedical signals into digital data for next analysis and processing. However, the ADC operates continuously. The power consumption is a very important factor in ADC circuit design.
A low power DAC suitable for biomedical signals is proposed in the ADC of this thesis. Through charge recycling technique in DAC circuit, the charge can be effectively reused to reduce power at the low input voltage.
The circuit accuracy and resolution are very essential, because of the application to biomedical signals. In order to increase both accuracy and linearity, the complementary signal generator and the multi-stage offset cancellation circuit are incorporated.
Besides, the comparator compares the input voltage and the DAC output reference voltage. The circuit achieves the 1 volt operation with a rail-to-rail input common range through the current driven bulk (CDB) technique to reduce threshold voltages.
In this thesis, a 1V supply voltage ADC is obtained with average power 32.5uW. For applications to biomedical signals the average power consumption is further reduced 9%. The differential nonlinearity (DNL) and integral nonlinearity (INL) results are less than 0.25LSB and 0.45LSB, respectively. The signal to noise ratio is 58dB and the effective bit resolution is 9.4 bit.

第一章 緒論…………………………………………………………...-1-
1.1 研究背景………………………………………………………-1-
1.2 研究動機………………………………………………………-2-
1.3 研究方向………………………………………………………-3-
1.3.1 數位電路研究…………………………………………..-5-
1.3.2 類比電路研究…………………………………………..-5-
1.4 論文結構說明…………………………………………………-6-
第二章 基本連續近似ADC結構………………………………….…...-8-
2.1 SA-ADC的結構與演算方法………………………………….-8-
2.2 時序控制與簡介……………………………………………..-11-
2.3 一般數位類比轉換器使用…………………………………..-12-
2.3.1數位類比轉換器說明………………………………….-12-
2.3.2 通用數位類比轉換器結構介紹………………………-15-
2.4比較器偏移電壓消除方法與分析…………………………...-21-
2.4.1 比較器的使用…………………………………………-21-
2.4.2偏移電壓的影響……………………………………….-23-
2.4.3偏移電壓消除方法…………………………………….-24-
2.4.3.1 輸入偏移儲存方式……………………………..-24-
2.4.3.2 輸出偏移儲存方式……………………………..-27-
2.5一伏特比較器電路…………………………………………...-29-
2.5.1應用於一伏特類比數位轉換器比較器……………….-30-
2.5.2一般一伏特比較器電路……………………………….-31-
第三章 一伏特低功率連續近似類比數位轉換器設計…………….-33-
3.1適合生醫訊號類比數位轉換器特性與架構………………..-33-
3.1.1 適合生醫訊號類比數位轉換器特性…………….…...-33-
3.1.2 生醫訊號SA-ADC電路架構…………………………-35-
3.2 數位電路設計 ………………………………………………-37-
3.2.1 數位控制邏輯電路設計………………………………-38-
3.2.2 移位暫存器電路設計…………………………………-43-
3.2.3 新的連續近似暫存器設計……………………………-47-
3.3 類比電路分析與討論………………………………………..-57-
3.3.1 具電荷回收功能數位類比轉換器分析與設計………-57-
3.3.1.1 傳統電荷能量計算………………..……………-58-
3.3.1.2 本論文電荷回收技術分析…………..…………-61-
3.3.2 比較器電路設計與分析………………………………-67-
3.3.2.1 多級偏移電壓抵消電路………………………..-67-
3.2.2.2 一伏特全擺幅輸入低功率單級預先放大器…..-68-
3.3.3 互補式信號產生器電路設計 ………………………..-73-
第四章 電路模擬與結果比較……………………………………….-76-
4.1 數位類比轉換器模擬 ………………………………………-76-
4.2 比較器電路模擬 ……………………………………………-79-
4.2.1 單級預先放大器電路模擬……………………………-79-
4.2.2 比較器模擬 …………………………………………..-83-
4.3 互補式信號產生器電路模擬………………………………..-88-
4.4 連續近似類比數位轉換器特性模擬………………………..-90-
4.4.1 一般特性模擬…………………………………………-90-
4.4.2 ADC電路靜態特性DNL與INL模擬………………..-93-
4.4.3 ADC電路動態特性模擬………………………………-96-
4.4.4 ADC電路使用在生醫訊號中模擬與功率比較………-98-
4.5 討論與比較………………...……………………………….-100-
第五章 電路佈局與測試考量……………………………………...-102-
5.1 ADC電路佈局考量…………………………………………-102-
5.1.1 DAC電路佈局考量…..………………………………-104-
5.1.2 比較器佈局考量……………………………………..-107-
5.1.3類比訊號源保護考量………………………………...-110-
5.1.4 CSG電路佈局考量…………………………………..-111-
5.1.5 ADC佈局完成說明與晶片封裝考量………………..-112-
5.2 ADC電路測試與量測方式…………………………………-116-
5.2.1雙向埠控制測試觀察DAC參考電壓電路……………-116-
5.2.2 ADC電路量測方法…………………………………..-119-
第六章 結論………………………………………………………...-122-
參考文獻…………………………………………………………….-124-

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