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研究生:翁樸男
研究生(外文):WENG PU NAN
論文名稱:1伏特全擺幅輸入運算放大器設計及其生醫低通濾波應用
論文名稱(外文):The design of 1V rail-to-rail OPAMP and its application for low-pass filtering of biomedical signals
指導教授:周煌程
學位類別:碩士
校院名稱:長庚大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:76
中文關鍵詞:1伏特全擺幅輸入
外文關鍵詞:1 volt input rail-to-rail
相關次數:
  • 被引用被引用:3
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由於生醫訊號的頻寬多在低頻,且信號微小,故生醫訊號放大器的低頻雜訊必須很小。而在設計這放大器電路是希望可以達到1伏特全擺幅輸入的效能,因此低通濾波器的電路是接在儀表放大器的後級,其輸入訊號已是一個被放大的大訊號,所以希望此放大器工作在電壓1伏特的情況下能有全擺幅輸入的效能,以致於信號不會失真。
在本論文中的目地主要是針對生醫訊號,設計一個1伏特全擺幅輸入運算放大器及生醫低通濾波器的應用。此處提出的1伏特全擺幅輸入運算放大器是採用CDB(current driven bulk)技術來實現,使差動輸入對的PMOS、NMOS電晶體的臨界電壓值能夠降低,進而克服了傳統式PMOS、NMOS平行式輸入放大器在1伏特情況下所造成死區的問題。在此實現放大器工作電壓(1伏特)、全擺幅輸入(輸入訊號0V~1V),並獲得等效輸入雜訊為42.17nV/rt Hz (小於100nV/rt Hz)、增益71dB、共模拒斥比100dB。
而在生醫低通濾波器的應用方面,使用了此運算放大器來設計,並對心電訊號來做模擬,其結果得到預期的效能,能應用在量測生醫訊號方面,此低通濾波器的總諧波失真為-30dB。最後並加以實現可規劃截止頻帶。
Due to the low frequency bandwidth and small magnitude of biomedical signals a bio-signal amplifier has to be low noise. In a biomedical signal processing system, the low pass filter is connected after the instrumentation amplifier. So the input signal to the low pass filter is a signal of large magnitude. Therefore, a rail-to-rail input range amplifier with low frequency noise is required for the low pass filter design.
In this thesis, a 1 volt rail-to-rail input range amplifier has been achieved. In the amplifier design, the current driven bulk (CDB) technique is adopted to reduce threshold voltages of input devices to eliminate the conventional dead zone problem. The performance results of the proposed 1 volt amplifier are input rail-to-rail with equivalent input noise at 42.17nV/rt Hz(<100nV/rtHz) , gain at 71dB and CMRR at 100dB . We use the proposed amplifier to implement a low pass filter for biomedical signal applications. Simulation results for an cardiac electrical signal are satisfactory. The total harmonic distortion of the designed low pass filter is -30dB. Besides, the programmable cut-off frequency of the bio-signal low pass filter is provided for use.
目 錄
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口試委員審定書
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誌謝...........................................................................................................................iv
中文摘要..................................................................................................................v
英文摘要..................................................................................................................vi
目錄............................................................................................................................vii
圖目錄.......................................................................................................................x
表目錄.......................................................................................................................xiv
第 一 章 緒 論 ………………………………………………………...….1
1.1研究背景 ……………………………………………………..…….1
1.2研究動機與目的 ……………………………………………...….3
1.3論文架構 ……………………………………………………….….5

第 二 章 生醫訊號與運算放大器的分析 …………..……..………...6
2.1生醫訊號及訊號處理流程 ……………………...…………...6
2.1.1心電圖訊號 …………………………..………..7
2.1.2標準肢導成系統….............................................8
2.2雜訊分析 .………………………………………………………10
2.2.1熱雜訊(Thermal noise) ……….………..10
2.2.2閃爍雜訊……………………………...….…….11
2.2.3射雜訊………………………………....………..12
2.3運算放大器分析………………………………......…………...13
2.3.1傳統運算大器 ………….………………....….13
2.3.2 CDB(current driven bulk)的技術 …..15
2.3.3 bulk-driven輸入運算大器 …………….18
2.3.4 Double P-channel 差動輸入對運算放大器…......................................................................20
2.3.5輸入動態level-shifting差動輸入對運算放大器….....................................................……24

第 三 章 1伏特全擺幅輸入運算放大器設計及生醫低通濾波器應用 ...…............................................................................................26
3.1設計需求…………………………………………………………26
3.2使用CDB技術實現1伏特全襬幅輸入運算放大器…….27
3.2.1電路分析…………………………………………29
3.2.2電路模擬結果…………………………..………34
3.3設計BULK端輸入放大器………………………………………38
3.3.1電路分析…………………………...…….………38
3.3.2電路模擬結果…. .……………………...………41
3.4 GATE端輸入與BULK端輸入比較表………………....……... 46
3.5生醫應用開關電容低通濾波器的設計……………….……47
3.5.1交換式電容濾波器……………………………49
3.5.2開關電容原理………………………….………51
3.5.3非重疊時脈產生電路…………………………53
3.5.4生醫應用低通濾波器電路模擬……….……54

第 四 章 佈局與量測考量………………………...……………………..61
4.1佈局考量…………………………………………………………61
4.2佈局後模擬結果……………………………..…………………65
4.3量測晶片的考量……………………………………..…………67
4.4參考文獻比較……………………………..……………………68
第 五 章 結論與未來研究方向……………………………….………..70

附 錄 OP放大器的量測方法………………….……………………72

參考文獻…………………………………………………………………………..76
參考文獻

[1] S. W. Chen, ”Biomedical Electronics,“ a handout of course, Electronic Engineering Chang Gung University.

[2]P.R.Gray and R.G. Meyer, Analysis and Design of Analog Integrated Circuits,John Wiley& Sons, Inc.,1993

[3] Behzad Razavi, Design of Analog CMOS Integrated Circuits, International Edition, McGraw-Hill, New York,2001.

[4] A. N. Chandorkar, “Design of Amplifier with Rail-to-Rail CMR with 1V Power Supply , “IEEE 2004

[5] T. Lehmann, M. Cassia ” 1-V Power Supply CMOS Cascode Amplifier, ” IEEE Journal of Solid-State Circuits, Vol. 36, No. 7, July. 2001.

[6] K. L. Elvi, R.R. J. Kostamovaara” A 1-V 5 uW CMOS-Opamp with Bulk-Driven Input Transistors, ” Roc 43rd IEEE,Aug 8- 11,2000.

[7]Phillip E. Allen. Douglas R.Holberg”CMOS Analog Circuit Design”second edition, OXFORD, New York, 2002

[8] C. J. Huang, H.Y. Huang, ” A Low-Voltage CMOS Rail-To-Rail Operational Amplifier Using Double P-Channel Differential Input Pairs,” IEEE 2004

[9] J. M. Carrillo, J. Francisco Duque-Carrillo, ”Constant-gm Constant-Slew-Rate High-Bandwidth Low-Voltage Rail-to-Rail CMOS Input Stage for VLSI Cell Libraries,” IEEE Journal of Solid-State circuits, Vol. 38, No. 8, Aug, 2003.


[10]J. Francisco Duque-Carrillo, “1-V Rail-to-Rail Operational Amplifiers in Standard CMOS Technology,” IEEE Journal of Solid-State circuits, Vol. 35, No. 1, Janu, 2000.

[11]J. Fonderie, M. M. Maris, E.J. Schnitger, J.H Huijsing,”1-V operational amplifier with rail-to-rail input and output ranges,” IEEE Journal. Solid-State Circuits, Vol.24, pp. 1551-1559,Dec.1989.

[13] A. Baschirotto, “A 1-V 1.8-MHz CMOS Switched-Opamp SC Filter with Rail-to-Rail
Output Swing,”IEEE Journal of Solid-State circuits, Vol. 32, No. 12, dec. 1997.

[14] S. S. Bustos, J. S. Martínez, “A 60-dB Dynamic-Range CMOS Sixth-Order 2.4-Hz Low-Pass Filter for Medical Applications” IEEE, Vol. 47, No. 12, dec. 2000.

[15] J. M. Carrillo, G. Torelli, R. P. Aloe, J. Francisco Duque-Carrillo”1-V Rail-to-Rail Bulk-Driven CMOS OTA With Enhanced Gain and Gain-Bandwidth Product” IEEE Vol 1, 28 Aug.-2 Sept. 2005

[16] Behzad Razavi,Design of Analog CMOS Integrated Circuits . McGraw-Hill, New York,2001.

[17]顏志仁,”用於量測生理訊號與醫療系統之類比積體電路研製,”中原大學碩士論,June 1996.

[18]張賢德,”心電圖機類比訊號處理模組積體電路研製,”中原大學碩士論文,June 1996

[19]J. Crols, M. Steyaert, ”Switched-Opamp: An Approach to Realize Full CMOS Switched-Capacitor Circuits at Very Low Power Supply Voltages,”IEEE Journal of Solid-State Circuits.Vol.29.NO.8.Aug. 1994.

[20]S. Chatterjee, P. Kinget, ”0.5-V Analog Circuit Techniques and Their Application in OTA and Filter Design,”IEEE Journal of Solid-State circuits, Vol, 40, No.12, dec. 2005.
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