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研究生:陳一帆
研究生(外文):Yi-Fan Chen
論文名稱:一個以架構樹集合分割演算法為基礎之訊號壓縮之電路之設計
論文名稱(外文):A Set Partitioning in Hierarchical Trees Based Signal Compression Circuit Design
指導教授:陳思文陳思文引用關係
指導教授(外文):Szi-Wen Chen
學位類別:碩士
校院名稱:長庚大學
系所名稱:電子工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:63
中文關鍵詞:離散小波轉換醫學訊號壓縮架構樹集合分割演算法
外文關鍵詞:DWTMedical Signal CompressionSPIHT
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本論文之目的在於研究設計並實現一個應用於醫學訊號壓縮的VLSI DSP電路,由於離散小波轉換具有多重解析度的特性,可使訊號在經其轉換後在高頻帶呈現優良的時間解析度,而在低頻帶則保有良好的頻率解析度,故已被許多新一代的訊號或影像壓縮演算法所採用。而本計畫所規劃之壓縮電路功能分以下兩部份:即先利用小波轉換將醫學訊號依不同頻帶進行訊號分解,然後再搭配「架構樹集合分割演算法」(SPIHT)針對轉換後所得之離散小波係數進行壓縮編碼。由於生醫訊號大都屬低頻訊號,取樣頻率極低,故在此我們對硬體的訴求在於力求能符合面積小、功率低的特性。為達此一目的,在此我們將採用一種新式的小波轉換架構,稱為上提式小波轉換,其較傳統的小波轉換更能節省硬體資源。針對本計畫所提之電路架構進行軟體模擬,初步結果也反映了該電路架構之可行性,未來將針對硬體電路進行設計並將其實現在FPGA晶片上,本電路未來亦可結合其他應用整合於在醫用嵌入式平台系統或是朝向醫用系統單晶片發展。
The aim of this thesis research is to design a novel VLSI DSP architecture of the medical signal compressor and implement it in hardware. Due to the characteristics of multiresolution, Discrete Wavelet Transform (DWT) provides good time-resolution at high frequencies and good frequency-resolution at low frequencies for a signal. Over the past decade, DWT has proven to be a useful technique in many aspects of applications into signal processing as well as compression. In this thesis, the proposed medical signal codec is constructed by a cascade combination of two parts: a DWT and a set partitioning in hierarchical trees (SPIHT) encoder. First, the input medical signal is decomposed into a number of dyadic frequency bands by DWT. After the wavelet transform, the compressor then uses the SPIHT algorithm to encode the wavelet coefficients. Since medical signals are mainly composed of lower frequency components thus only low sampling rate is demanded in most cases, a small area and low power compressor chip would represent the most significant requirements for our design in hardware. In order to meet the requirements of area and power, we here adopt the lifting structure for the implementation of DWT computation in our design. Results obtained after performing software simulations demonstrate the feasibility of the proposed VLSI architecture. The novel compressor will be finally verified and implemented using an FPGA chip for real-time applications. The proposed compressor IP may be also served as a coprocessor on an ARM-based embedded system or a medical system-on-chip (SoC) in near future.
目錄

第一章 緒論…………………………..…………………………………1
1.1 研究背景及目的………………………………………………..1
1.2 相關研究……………………………………………………..…3
1.3 章節概要…………………………..……………………………5
第二章 離散小波轉換……………………………………….………….6
2.1 前言……………….……………………………….……………6
2.2 離散小波轉換………………………………………….……….6
2.2.1 一維離散小波轉換………………………………………6
2.2.2 二維離散小波轉換………………………………………9
2.3 上提式離散小波轉換…………………………………………11
2.4 電路架構設計…………………………………………………15
第三章 架構樹集合分割演算法………………………………………28
3.1 前言……………………………………………………………28
3.2 漸進式壓縮技術………………………………………………28
3.3 空間方向樹…………………………………………………....30
3.4嵌入式零樹小波編碼.………………………………………….32
3.5架構樹集合分割演算法…………..……………………………34
3.6 SPIHT演算法範例……………………………………………..41
3.7 SPIHT硬體架構……………………………………………….46
3.8 壓縮編碼電路系統架構………………………………………47
第四章 軟硬體模擬與比較……………………………….……..…….49
4.1 前言……………………………………………………………49
4.2 軟體模擬………………………………………………………50
4.3 硬體模擬……………………………………………….……...55
4.4 軟硬體結果比較………………………………………………56
第五章 結論與未來研究方向…………………………………………59
參考文獻………………………………………………………………..61
參考文獻

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