臺灣博碩士論文加值系統

主動矩陣液晶顯示器﹙AMLCDs﹚因為其輕、薄、低輻射量及低耗電量的種種優點，近年來已經漸漸地取代了傳統的陰極射線管﹙CRT﹚顯示器。主動矩陣液晶顯示器以往都是利用非晶矽薄膜電晶體來當作畫素開關元件。然而如果要把週邊驅動電路一起整合到主動矩陣的玻璃基板上，低溫多晶矽薄膜電晶體肯定是唯一的選擇，這也是近幾年來低溫多晶矽薄膜電晶體一直被廣為研究的主要原因。
本論文成功的將高介電常數的氧化鋁鑭整合至低溫多晶矽薄膜電晶體當作閘極氧化層，而所得到的高驅動電流、低臨界電壓和低次臨界斜率大大提升了元件的性能。不僅如此，也因此而達成高的開/關電流比率及閘極崩潰電場。有別於一般的TFT元件，此種元件並無使用一些介面鈍化處理或是特別的結晶步驟；上述所得之優秀的特性與所使用的閘極氧化層種類有密切關係，因為使用氧化鋁鑭作為閘極氧化層，可造成高閘極電容密度與很小的等效氧化層厚度。
低溫多晶矽薄膜電晶體常用於控制動態矩陣液晶顯示器，然而針對於像素及顯示電路發展高性能的薄膜電晶體，是個很大的挑戰。一般像素的電晶體須操作在高電壓且低閘極漏電的環境下來驅動液晶，但是高速的顯示電路需要電晶體操作在低電壓、高驅動電流且低臨界電壓的環境。而使用氧化鋁鑭為閘極氧化層的薄膜電晶體，可擁有高崩潰電壓及在5V操作可產生高驅動電流的特性。
除此之外，高介電常數(~23)的氧化鋁鑭在CMOS元件的應用中，有著很小的溫度不穩定性及很優良的可靠度；介電常數的增加提升了電容密度，更重要的是使得臨界電壓下降並減少了閘極的漏電，這都是因為閘極氧化層物理厚度增加的緣故。在之前將氧化鋁應用在TFT上的論文內容中已經發表過，由於K值提升使得閘極電容值增加，也進一步地讓臨界電壓的值降低。在本論文中，以氧化鋁鑭為閘極氧化層的薄膜電晶體，顯示出其較低的臨界電壓（約1.2V），不錯的閘極崩潰電場（約6.3MV/㎝），很小的次臨界斜率擺幅（約0.31V/dec），較大的等效載子遷移率（約40㎝2/Vs），和最重要的大開/關電流比率（約1.5×106）及很大的驅動電流值（約21μA/μm）。而以氧化鋁鑭為閘極氧化層之TFT，其較高的崩潰電壓和較高的驅動電流，剛好讓我們聯想到，很符合能應用在像素電晶體及顯示器電路所需要的條件。

Low-temperature poly-Si (LTPS) thin-film transistors (TFTs) are used for active matrix liquid crystal displays (AMLCDs) on glass substrates. However , a difficult technological challenge is to develop high-performance TFTs that are useful for both pixel and display circuits . Pixel TFTs need to operate at high voltages with low gate-leakage currents, to drive the liquid crystal. In contrast, high-speed display circuits require TFTs to operate at low voltages and high drive currents, with a low threshold voltage（Vth）. In this letter, we report high-K LaAlO3 gate dielectric TFTs which show a high breakdown voltage and transistor drive current at 5 V. In addition to the very high-K（~23）, the LaAlO3 has good device reliability of low bias-temperature instability among high- CMOS devices. The performance is due to the increase, by a factor of Kdielectric/KSiO2, in the gate capacitance density. This lowers the Vth and improves both the gate-leakage current and breakdown field, since the thickness of the high-K dielectric layer can be increased. Although the high-K Al2O3 TFT was previously reported , the relative lower K of 9–10 and gate capacitance have smaller effect to lower down the Vth. The LaAlO3 TFTs showed a low of 1.2 V, a high gate-dielectric breakdown field of 6.3 MV/cm, low subthreshold swing of 0.31 V/dec, high field-effect mobility of 40 cm /Vs, a large on-off-state drive current ratio（Ion/Ioff）of 1.5×106 and high drive current up to 21 A/ m. The high breakdown voltage and high transistor drive current suggest that the LaAlO3 TFTs can meet the device requirements for both pixel and display circuits.

第一章 導論
1.1 薄膜電晶體（TFTs）之技術沿革 P1
1.2 多晶矽『再結晶』的方式 P3
1.2.1 固相結晶法（SPC） P3
1.2.2 雷射結晶法（ELC） P4
1.2.3 金屬誘導側向結晶法（MILC） P5
1.3 高介電常數材料應用於閘極氧化層之技術 P5
1.3.1 介電值與能障高度 P6
1.3.2 閘極邊緣熱穩定性的問題 P7
1.3.3 低介電介面層存在的問題 P7
1.3.4 薄膜型態 P8
1.3.5 製程方式 P8
1.4 金屬閘極技術 P8
1.4.1 功函數 P9
1.4.2 製程匹配性 P9
1.5 研究動機 P9
1.6 論文概要 P10
1.7 參考文獻 P11
第二章 金氧半電容（MIS capacitor）實際製作與量測分析
2.1 MIS電容元件的分析概念 P16
2.1.1 MIS電容的基本理論 P16
2.1.2 電容-電壓特性 P17
2.1.3 MIS電容透過C-V所能提供的電性資料 P22
2.2 MIS電容元件實際製作與量測 P24
2.2.1 晶片清洗 P25
2.2.2 蒸鍍薄膜 P25
2.2.3 薄膜緻密化 P27
2.2.4 製作上電極 P28
2.2.5 圖形定義 P28
2.2.6 蝕刻鋁電極與氧化鋁鑭薄膜 P29
2.2.7 製作下電極 P30
2.2.8 完成 P30
2.3 MIS電容元件電性量測與分析 P31
2.3.1 不同溫度的熱處理製程對磁滯現象的影響 P31
2.3.2 不同溫度的熱處理製程對於反轉區的影響 P34
2.3.3 不同溫度的熱處理製程對於閘極氧化層崩潰電壓的影響 P35
第三章 以氧化鋁鑭作為閘極氧化層製作低溫多晶矽薄膜電晶體
3.1 傳統低溫多晶矽薄膜電晶體元件之特性與結構 P38
3.1.1 特性曲線 P38
3.1.2 臨界電壓 P39
3.1.3 次臨界擺幅 P40
3.1.4 漏電流 P41
3.1.5 等效載子遷移率 P41
3.1.6 熱載子效應與元件可靠度 P42
3.2 以氧化鋁鑭作為閘極氧化層之低溫多晶矽薄膜電晶體製作流程 P43
3.2.1 成長濕氧氧化層以模擬玻璃基板 P43
3.2.2 沉積多晶矽薄膜以當作電晶體之通道 P44
3.2.3 沉積場氧化層（Field Oxide） P45
3.2.4 定義主動區（active region）－第一道光罩 P45
3.2.5 離子佈植與活化（activation） P46
3.2.6 除去場氧化層以沉積閘極氧化層－第二道光罩 P47
3.2.7 沉積閘極氧化層 P47
3.2.8 高介電值材料緻密化製程 P48
3.2.9 蝕刻閘極氧化層以開出源/汲極之接觸洞口－第三道光罩 P48
3.2.10 沉積金屬薄膜作為電極 P49
3.2.11 定義閘極、源極和汲極的電極－第四道光罩 P49
3.2.12 電晶體完成 P50
3.3 以氧化鋁鑭作為閘極氧化層之低溫多晶矽薄膜電晶體電性探討 P50
3.3.1 Id-Vd電晶體特性曲線 P50
3.3.2 Id-Vg特性曲線 P52
3.3.3 元件崩潰電場量測 P53
3.3.4 元件閘極電壓飄移度 P54
3.3.5 各類不同之閘極氧化層特性比較 P55

第四章 結論與未來發展
4.1 結論 P58
4.2 未來發展 P58

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