臺灣博碩士論文加值系統

本論文研究著重於鎖相迴路(Phase-Locked Loop)內之壓控振盪器(Voltage-Controlled Oscillator)之設計與研究，並探討造成振盪電路相位雜訊之成因及改善方法，本研究以低相位雜訊、低功耗及寬調頻範圍為目標。

本論文提出兩個可適用於多頻帶正交分頻多工聯盟(MBOA)頻帶規範之正交壓控振盪器VCO-I及VCO-II。

VCO-I採用互補式交錯耦合對架構，使用累增模式變容器及切換式調頻電容，振盪頻率可從5.187GHz~6.490GHz；相位雜訊在距離5.955GHz之載波100kHz處為-82.711dBc/Hz，在距離5.530GHz載波100kHz處為-82.873dBc/Hz；供應電壓為2.1V；振盪器核心功率消耗為12.94mW；輸出功率大於1dBm。

VCO-II採pMOS交錯耦合對的架構，振盪頻率可從5.21GHz~6.38GHz；相位雜訊在距離5.95GHz之載波100kHz處為-89.14dBc/Hz，在距離5.40GHz載波100kHz處為-88.09dBc/Hz；供應電壓為1V；振盪器核心功率消耗為9.42mW；輸出功率為-7dBm及1dBm。

This thesis will focus on the study and design of voltage-controlled oscillators, which are often integrated in phase-locked loops. Furthermore, the cause of phase noise and its improvement methods were also discussed. The goal of this thesis is to achieve low phase noise, low power consumption and wide tuning range.

Two voltage-controlled oscillator circuits with quadrature outputs named VCO-I and VCO-II which meet the band allocation proposed by MultiBand OFDM Alliance (MBOA) were proposed.

A CMOS cross-coupled pair was used to provide negative resistance in VCO-I, the oscillation frequency ranges from 5.187GHz to 6.490GHz by using accumulation mode varactors and switch tuning capacitor. The phase noise at 100kHz offset from 5.955GHz carrier is -82.711dBc/Hz and at 100kHz offset from 5.530GHz carrier is -82.873dBc/Hz. The supply voltage is 2.1V and the output power is greater than 1 dBm over the whole oscillation frequency range.

VCO-II uses pMOS cross-coupled pair topology, its oscillation frequency ranges from 5.21GHz to 6.38GHz. The phase noise at 100kHz offset from 5.95GHz carrier is -89.14dBc/Hz and at 100kHz offset from 5.40GHz carrier is -88.09dBc/Hz. The supply voltage is 1V and the output power is -7 and 1 dBm.

中文摘要 i
英文摘要 ii
目錄 iii
圖目錄 v
表目錄 viii

第一章 緒論
1.1 研究背景 1
1.2 超寬頻通訊標準 2
1.3 研究動機 3
1.4 研究流程與論文架構 4

第二章 振盪器基本原理
2.1 振盪器之分析 6
2.2 振盪器之種類 11
2.3 LC振盪器架構 12

第三章 振盪器之效能評估
3.1 相位雜訊 18
3.2 相位雜訊之改善技術 27
3.3 調頻範圍 33
3.4 Pushing 35
3.5 Pulling 36

第四章 積體化電感之特性
4.1 簡介 38
4.2 積體化電感之等效模型 38
4.3 積體化電感之非理想特性 40
4.4 電感之品質因素 43
4.5 結論 46

第五章 壓控振盪器分析與設計
5.1 簡介 47
5.2 互補式交錯耦合正交壓控振盪器設計(VCO-I) 47
5.3 pMOS交錯耦合正交壓控振盪器設計(VCO-II) 60

第六章 結論與未來展望 73

參考文獻 74

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