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研究生:林永宗
研究生(外文):Yong-Zong Lin
論文名稱:高效率的分段式指令壓縮與管線式解壓縮系統
論文名稱(外文):An Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System
指導教授:蔣元隆蔣元隆引用關係
指導教授(外文):Yuan-Long Jeang
學位類別:碩士
校院名稱:國立高雄應用科技大學
系所名稱:電子與資訊工程研究所碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:英文
論文頁數:73
中文關鍵詞:指令壓縮
外文關鍵詞:Instruction Compression
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在本篇論文中,我們提出一套高效率的壓縮與解壓縮系統,我們的分段式指令壓縮能夠提高ARM7TDMI的指令密度,有效的使用程式記憶體空間,進而降低記憶體在晶片上所占的比例。首先我們根據跳躍指令,在程式碼中劃分出我們所定義的基本區塊後,統計在程式碼中,各個欄位的符號所出現的機率,再依據機率的高低,重新組合各個欄位,再用霍夫曼演算法壓縮各個部份,以達到更佳的壓縮率。然而在處理器要執行之前,必需透過解壓縮電路來還原程式碼,但這可能會令整個系統的效能有所損耗。因此在解壓縮的部份,我們提出了一個填補指令的方法,來避免效能的損耗。在這裡我們設計了一個管線式的解壓縮系統,改善了跳躍指令所造成的時間延遲。然而這必須要浪費大約3%的壓縮率,來換得效能的提升。在實驗結果中,我們的平均壓縮率在55%~65%,並且解壓縮電路與處理器之間能夠正常工作,而不造成整體系統效能的損失。
In this paper, we propose an efficient code compression and decompression system. The instruction density of ARM7TDMI can be increased that using our field partition compression method, put the program memory with effect and then reduce the rate of memory on the chip further. In the first place, we accord to the branch instruction to demarcate the basic block which defined in the machine code. And then calculate the appearance probability of the symbols of each field in the machine code. Base on the level of probability to re-integrate each field, and then use Huffman algorithm to compress each section, to obtain the better compression ratio. However before the processor execution, must to go through the decompression circuit to restore the machine code. But it may make some loss for efficiency of the whole system. So in our decompression portion, we proposed a filled method to avoid the loss of efficiency. We designed a pipeline decompression system to improve the time delay, but must waste approximately 3% compression ratio. In experimental results, the average compression ratio is about 55%~65%. The decompression circuit and processor can work normally, and does not cause the losses of the whole system efficiency.
摘要 i
Abstract ii
Acknowledgement iii
List of Tables vii
List of Figures viii
Chapter 1 - 1 -
1. Introduction - 1 -
1.1. Motivation - 1 -
Chapter 2 - 2 -
2. Related Work - 2 -
2.1. Embedded System Program Compression - 2 -
2.2. Mini-Subroutines - 5 -
2.3. Dictionary-Based Compression Method - 7 -
2.4. SAMC - 10 -
2.5. SADC - 12 -
2.6. Pipeline decompression architecture for embedded systems - 13 -
2.7. ARM Thumb [19] - 15 -
2.8. MIPS MIPS16e [19] - 17 -
2.9. PowerPC CodePack [19] - 18 -
2.10. ARM Thumb-II [19] - 20 -
Chapter 3 - 21 -
3. Compression Algorithm - 21 -
3.1. Motivation - 21 -
3.2. ARM Instruction Format [21] - 23 -
3.2.1. The Condition Field [21] - 25 -
3.2.2. Branch and Branch with Link - 26 -
3.3. Field Partition - 27 -
3.4. Basic Block - 33 -
3.5. Implement of the instruction compression - 35 -
Chapter 4 - 37 -
4. Decompression Unit - 37 -
4.1. System Overview - 37 -
4.2. Double-buffering technology - 39 -
4.3. Pipelined decompression engine of the previous version - 42 -
4.4. Our pipeline decompression system [16] - 44 -
Chapter 5 - 51 -
5. Experiment Results - 51 -
5.1. Compression Ratio - 51 -
5.2. Compression Ratio Compare with Hardware Cost - 55 -
5.3. Experimental Results Comparison - 56 -
Chapter 6 - 57 -
6. Discussions and Conclusions - 57 -
Reference - 58 -
[1]A. Wolfe and A. Chanin. “Executing Compressed Programs on an Embedded RISC Architecture.” Proceedings of the 25th Annual international Symposium on Microarchitecture, p.81-91, Dec. 1992.
[2]S. Liao, S. Devadas, K. Keutzer. “A text-compression-based method for code size minimization in embedded systems.” To appear in ACM Transactions on Design Automation of Electronic Systems, 4(1), 1998.
[3]C. Lefurgy, P. Bird, I. Chen and T. Mudge. “Improving Code Density Using Compression Techniques.” Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Micro-architecture, pp. 194-203, Dec. 1997.
[4]P. Bird and T. Mudge, “An instruction stream compression technique,” Electrical Engineering and Computer Science Dept., Univ. of Michigan, Tech. Rep. CSE-TR-319-96, Nov. 1996.
[5]H. Lekatsas and W. Wolf. “SAMC: A code Compression Algorithm for Application Processors.” IEEE Trans. on Computer-Aided Design of Integrated Circuits and System, Vol. 18, p. 1689-1701, Dec. 1999.
[6]H. Lekatsas and W. Wolf. “Random access decompression using binary arithmetic coding,” in Proc. 1999 IEEE Data Compression Conf., Mar. 1999, pp. 306–315.
[7]P. G. Howard and J. S. Vitter, “Practical implementations of arithmetic coding,” Image and Text Compression. Norwell, MA: Kluwer Academic, 1992, pp. 85–112.
[8]H. Lekatsas and W. Wolf, “Code compression for embedded systems,” in Proc. Design Automation Conf., June 1998, pp. 516–521.
[9]Haris Lekatsas, Jorg Henkel, W. Wolf, “Design and Simulation of a Pipelined Decompression Architecture for Embedded Systems.” ISSS’01, Oct. 1-3, 2001.
[10]J. A. Storer and T. G. Szymanski, “Data compression via textual substitution,” J. ACM, vol. 29, no. 4, pp. 928–951, Oct. 1982.
[11]Y. Xie, W. Wolf, and H.Lehtsas, “Compression Ratio and Decompression Overhead Tradeoffs in Code Compression for VLIW Architectures.” Proceedings of the 4th International Conference on ASIC, pages 337-341, October 2001.
[12]Y. Xie, W. Wolf and H. Lekatsas. “Code Compression for VLIW using Variable-to-fixed coding.” Proc. of ISSS, 2002.
[13]C. H. Lin, Y. Xie and W. Wolf. “LZW-Based Code Compression for VLIW Embedded Systems.” Proc. of DATE, 2004.
[14]Yuan-Long Jeang, Jen-Wei Hsieh, Yong-Zong Lin, “An Efficient code Compression/Decompression System Based on Field Partitioning.” International Technical Conference on Circuits/System, Computers and Communications (ITC-CSCC 2005).
[15]Yuan-Long Jeang, Jen-Wei Hsieh, Yong-Zong Lin, “An Efficient Instruction Compression/Decompression System Based on Field Partitioning.” 2005 IEEE International Midwest Symposium on Circuits and Systems, Aug. 7-10, 2005.
[16]Yuan-Long Jeang, Yong-Zong Lin, “An Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System.” 2006 IEEE International Symposium on VLSI Design, Automation & Test, Apr.26-28, 2006
[17]Ming-Ting Sun and Shaw-Min Lei. “An Entropy Coding System for Digital HDTV Application.” IEEE Tran. On Circuits and System for Video Technology, Vol. 1, p. 147-155, Mar. 1991.
[18]Ming-Ting Sun and Shaw-Min Lei, High-Speed entropy for HDTV.” IEEE 1992 Custom Integrated Circuits Conf.
[19]http://www.embedded.com//showArticle.jhtml?articleID=17701289
[20]www.arm.com, ARM740T Datasheet.
[21]ARM, “ARM7TDMI Data Sheet,” 1995.
[22]www.samsung.com, Specification Data, “S3C4510B User’s Manual”.
[23]Steve Furber, “ARM System-on-Chip Architecture,” 1996.
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