臺灣博碩士論文加值系統

本論文旨在結合傳導式原子力顯微鏡之微觀量測能力以及半導體參數分析儀（HP4156C）之強大電性量測能力，研究極薄氧化層在奈米尺度下之行為。將傳導式原子力顯微鏡之導電探針與氧化層直接接觸，取代傳統金氧半電容結構之金屬閘極，可直接觀察到單一崩潰點之電性行為。將之結合HP4156C後可施加斜坡式電壓應力（RVS），得到氧化層電流-電壓特性隨著RVS次數之增加的變化；施加定電壓（CVS）得到電流-時間特性，以及施加不同限制電流條件的CVS以量測應力施加前後的電流-電壓特性，並利用傳導式原子力顯微鏡得到表面形貌及電流影像。

由實驗結果指出，發現未施加應力之3nm與5nm氧化層電流-電壓特性會依循Fowler-Nordheim（FN）tunneling。施加RVS使氧化層崩潰後，電流-電壓特性曲線會大幅度往低電壓處偏移，並且依循Power law特性，之後電流隨RVS次數於小電壓處左右偏移，我們認為這是因為施加RVS的過程中，額外的缺陷（trap）於氧化層內產生，當缺陷達到一定數量形成連接的漏電流路徑時並造成氧化層崩潰，而缺陷因補陷或被捕陷機制使得整體氧化層之能位障壁提升或降低，使得電流特性RVS次數而有偏移。我們也施加CVS並設定不同之限制電流在氧化層崩潰後量測其電流-電壓特性。我們發現崩潰後的電壓-電流特性存在兩種傳導機制，分別依循FN tunneling與Power law特性，且前者出現的機率會隨著限制電流的增加而減少，後者則相反。這是因為在施加較低限制電流的CVS時，氧化層內產生缺陷較少，電子藉由缺陷的補陷或被捕陷方式穿隧氧化層，因此電流行為會依循FN tunneling；施加較高限制電流的CVS時，氧化層內產生缺陷較多，且能形成連接的漏電流路徑，整體電流行為便依循Power law特性。藉由此一實驗，可以很容易地釐清文獻上關於崩潰電流-電壓行為的爭議。此外，透過電流影像可以發現崩潰行為最初於一點觸發，隨著應力施加開始擴散至鄰近區域，增加崩潰影響之面積，並達到飽和，不再隨著應力的施加而增加影響面積。

The main purpose of the thesis is to study the degradation and breakdown behavior of ultra-thin oxide under nano-scaled stress by using conductive atomic force microscopy (C-AFM) in conjunction with the semiconductor parameter analyzer HP4156C.

The conductive tip of C-AFM is in contacted with the oxide surface, which acts as the metal gate electrode in a conventional metal-oxide-semiconductor (MOS) capacitor for electrical measurements. The limited current compliance of C-AFM can be extended and constant voltage stress (CVS) as well as ramped voltage stress (RVS) can be applied to the samples after the HP4156C is connected with the C-AFM.

In this work, the I-t characteristics were measured after the application of CVS, and the I-V characteristics were obtained after CVS with different current compliances and for various numbers of repetitive RVS as well. Surface morphologies and current images were also measured by C-AFM.

From the experimental results, we found that the I-V characteristics of fresh oxide with thickness of 3 nm and 5 nm followed the Fowler-Nordheim (FN) tunneling. Oxide breakdown occurred after several repetitive RVS applied, which caused the I-V curves shift along the voltage axis to smaller voltage values. Different from the fresh-oxide, the post-breakdown I-V characteristics followed the power-law behavior. We attributed this voltage shift to the formation of a percolation path within the oxide layer between the probe tip and the Si-substrate, which is a result of defect generation during the RVS applied. We also found that the post-breakdown I-V curves shifted back and forth around a small voltage if RVS was continuously applied. We suspected this phenomenon is caused by the increase/decrease of the effective barrier height at the Si/SiO2 interface due to charge trapping/de-trapping in the generated traps.

For the post-breakdown I-V characteristics of oxide subjected to CVS with different current compliances, we observed two different conduction mechanisms. One follows the FN tunneling and the other follows the power-law conduction. The occurrence of these two conduction mechanisms depends on the value of the compliance current. As the value of current compliance increases, the occurrence of FN tunneling decreases but that of I-V followed power-law increases. The reason is that the less traps were generated under CVS with lower current compliance; hence electrons would tunnel through the oxide via the generated traps. On the contrary, higher density of traps would be generated if current compliance is high and leakage path might be formed easily.

From the results of our work, we can understand more clearly about the post-breakdown behavior of oxide layer. Besides, through the current image capability of the C-AFM, we observed the propagation of breakdown spots on oxide surface. The breakdown was triggered at on weak spot under the area of stress applied and would propagate laterally to the neighboring areas when CVS was applied. The area of the breakdown spot increases with increasing stress time.

目次

第一章 緒論--------------------------------------------------------1
1-1 金屬-氧化層-半導體技術演進瓶頸-------------------------------1
1-2 氧化層可靠度分析-------------------------------------------1
1-2-1 巨觀量測--------------------------------------------2
1-2-2 微觀量測--------------------------------------------4
1-3 研究動機--------------------------------------------------5
第二章 實驗設定------------------------------------------------------13
2-1 原子力顯微鏡（Atomic force microscopy, AFM）--------------13
2-1-1 原子力顯微鏡介紹（AFM）------------------------------13
2-1-2 傳導式原子力顯微鏡（conductive-AFM,C-AFM）
----------------------------------------------------------15
2-1-3 結合半導體參數分析儀（HP 4156C Semiconductor
Parameter Analyzer）-------------------------------------16
2-2 樣品製備-------------------------------------------------16
2-3 量測設定-------------------------------------------------17
2-4 量測步驟-------------------------------------------------19
第三章 結果分析及討論-----------------------------------------------27
3-1 前言-----------------------------------------------------27
3-2 施加RVS於5nm氧化層之電流-電壓特性---------------------------27
3-2-1 未施加應力氧化層之電流-電壓特性-----------------------27
3-2-2 崩潰後氧化層之電流-電壓特性---------------------------29
3-3 施加CVS於氧化層之電流-時間特性------------------------------30
3-3-1 崩潰前氧化層電流-時間特性----------------------------30
3-3-2 崩潰後氧化層之電流-電壓特性---------------------------32
3-4 限制電流與氧化層崩潰行為-----------------------------------32
3-4-1 崩潰後氧化層之電流電壓特性----------------------------32
3-4-2 mode 1機制-----------------------------------------33
3-4-3 mode 2機制-----------------------------------------35
3-5 限制電流與電流影像-----------------------------------------37
第四章 結論與未來展望-------------------------------------------------64
4-1 結論-----------------------------------------------------64
4-2 未來展望-------------------------------------------------65
參考文獻------------------------------------------------------------66

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