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研究生:洪健復
研究生(外文):Chien-Fu Hung
論文名稱:給液晶顯示器應用之數位類比轉換器與壓控振盪電路設計
論文名稱(外文):A D/A converter for LCD Driver Application and VCO Design
指導教授:盧志文盧志文引用關係
指導教授(外文):Chih-Wen Lu
學位類別:碩士
校院名稱:國立暨南國際大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:52
中文關鍵詞:數位類比轉換器液晶顯示器壓控振盪器
外文關鍵詞:Digital-to-Analog ConverterLiquid Crystal DisplayVCO
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本論文第一部份,針對改善輸出電壓偏差,提出了一個十位元數位類比轉換器架構,電路是由六位元電阻串數位類比轉換器和十位元R-2R數位類比轉換器組成,適合應用在中小尺吋薄膜電晶體液晶顯示器,電路使用TSMC 0.35μm 2P4M35 CMOS製程製作。
本論文第二部份是一個使用傳輸線共振腔之20-GHz壓控振盪器。藉由實作的過程,了解傳輸線在高頻的特性,可等效於一個小感值電感,並且有著比一般螺旋電感更為良好的Q值與特性,適合應用在毫米波或更高頻段。電路使用TSMC 0.18μm 1P6M18 CMOS製程製作,量測輸出頻率範圍是18..92GHz~20.76GHz,相位雜訊為-96dBc/Hz@1MHz offset。
In the first part of this thesis, a 10-bit digital-to-analog converter is proposed to alleviate the output offset voltage. The circuit is composed of a 6-bit r-string DAC and a 10-bit R-2R DAC, which is suitable for medium or small size TFT-LCD. The circuit is realized by TSMC 0.35μm 2P4M35 CMOS process technology.

In the second part, a 20 GHz VCO with transmission line resonator is proposed. The experimental results had proved that the transmission line should be regarded as a inductor with very small inductance when it is operated at a very high frequency. Besides, a transmission line resonator performs high Q factor at such high frequency, whereas a planar spiral inductor does not. Hence, it is more suitable for high frequency application, such as Millimeter Wave. The circuit is realized by TSMC 0.18μm 1P6M18 CMOS process technology. The measured results show that the oscillator operate from 18.92 GHz to 20.76 GHz and the phase noise is -96dBc/Hz@1MHz offset.
目錄
致謝
中文摘要...................................................................................................... Ⅰ
英文摘要...................................................................................................... Ⅱ
目錄............................................................................................................. Ⅲ
圖目錄...........................................................................................................Ⅴ
表目錄...........................................................................................................Ⅸ

第一章 緒論............................................................................................1
1.1 液晶與液晶顯示器簡介......................................................................1
1.1.1 液晶顯示器的分類...............................................................2
1.2 TFT-LCD系統簡介........................................................................4
1.2.1 TFT-LCD基本架構...............................................................4
1.2.2 TFT-LCD面板結構...............................................................5
1.2.2源極驅動器架構...................................................................6
1.3 TFT-LCD顯示原理..........................................................................7
1.3.1液晶的電光效應與偏光特性...................................................8
1.3.2 TFT-LCD驅動原理.............................................................. 8
1.3.2 反轉法...............................................................................9
1.3.3 迦瑪校正..........................................................................10
1.4 論文架構 .....................................................................................10

第二章 數位類比轉換器之介紹.....................................................................11
2.1 簡介與應用...................................................................................11
2.2 數位類比轉換器之規格..............................................................12
2.2.1 解析度................................................................12
2.2.2 偏移誤差 (Offset error)............................................13
2.2.3 增益誤差 (Gain error)..............................................13
2.2.4 微分非線性誤差 (Differential nonlinearity error, DNL)...........14
2.2.5 積分非線性誤差 (Integral nonlinearity error, INL) ................14
2.2.6 單調性 (Monotonicity)....................................................15
2.2.7 穩定時間 (Settling time)...................................................16
2.3 數位類比轉換器之架構 .................................................................17
2.3.1 電流調變式數位類比轉換器...............................................18
2.3.2 電壓調變式數位類比轉換器...............................................19
2.3.3 電荷調變式數位類比轉換器...............................................19

第三章 十位元數位類比轉換器之設計..................................................22
3.1 研究動機.........................................................................................22
3.2 本文提出之數位類比轉換器架構.......................................................22
3.3一般源極驅動器之數位類比轉換器......................................................24
3.3.1電阻串數位類比轉換器........................................................25
3.3.2 R-2R數位類比轉換器..........................................................26
3.4 交替式輸出緩衝器..........................................................................27
3.5 資料線負載................................................................................29
3.6 模擬結果..................................................................................30
3.7 晶片佈局圖................................................................................34
3.8 結論.........................................................................................34

第四章 壓控震盪器之設計....................................................................35
4.1 研究動機....................................................................................35
4.2壓控振盪器之基本工作原理..................................................................36
4.2.1迴授式...............................................................................36
4.2.2反射式...............................................................................36
4.3 壓控震盪器之架構.............................................................................37
4.3.1環形振盪器.........................................................................37
4.3.2 LC-tank振盪器...................................................................37
4.4相位雜訊之分析...............................................................................38
4.5使用傳輸線共振腔之壓控振盪器設計...................................................41
4.6 模擬結果......................................................................................43
4.7 量測結果......................................................................................46
4.8佈局圖與晶片照相圖..........................................................................49
4.9 結論................................................................................................50
參考文獻.........................................................................................................51











圖目錄

第一章 緒論 ..................................................................................................1
圖1-1 液晶物質的相變化.........................................................................1
圖 1-2 TFT-LCD系統方塊圖....................................................................4
圖 1-3 TFT-LCD實體構造圖................................................................... 5
圖1-4 一般源極驅動器架構...................................................................6
圖 1-5 液晶的電光效應...........................................................................7
圖1-6 TFT-LCD面板等效電路.................................................................8
圖 1-7 TFT-LCD反轉法示意圖.................................................................9
圖 1-8 (a)液晶的穿透率(T)和外加資料電壓(V)關係曲線
(b)理想的數位顯示資料和對應的液晶穿透率示意圖......................10

第二章 數位類比轉換器之介紹......................................................................11
圖 2-1 一般數位類比轉換器示意圖.........................................................11
圖 2-2 取樣頻率對解析度關係圖.........................................................12
圖 2-3 偏移誤差示意圖...........................................................................13
圖 2-4 增益誤差示意圖........................................................................13
圖 2-5 DNL示意圖.................................................................................14
圖 2-6 INL 示意圖.............................................................................15
圖 2-7 單調性示意圖.............................................................................15
圖 2-8 穩定時間……………….........................................................16
圖 2-9 數位類比轉換器分類圖...............................................................17
圖 2-10 電流調變式數位類比轉換器示意圖...............................................18
圖 2-11 R-2R數位類比轉換器電路..........................................................18
圖 2-12 電壓調變式數位類比轉換器示意圖...............................................19
圖 2-13 (a)溫度計碼電阻串DAC (b)二位元開關陣列DAC...........................19
圖 2-14 電荷調變式數位類比轉換器示意圖..............................................20
圖 2-15 電荷調變式數位類比轉換器........................................................21

第三章 十位元數位類比轉換器之設計..........................................................22
圖 3-1 本文提出之10位元數位類比轉換器架構方塊圖.............................. 23
圖 3-2 驅動過程示意圖.......................................................................23
圖 3-3 數位類比轉換器.......................................................................................24
圖 3-4 六位元電阻分壓式數位類比轉換器.........................................................25
圖 3-5 R-2R電壓式數位類比轉換器.......................................................... 26
圖 3-6 輸出緩衝器及傳輸閘............................................................................ 28
圖 3-7 輸出緩衝器電路圖................................................................................28
圖 3-8 資料線負載等效電路.................................................................................29
圖 3-9 輸出波形,當輸入數位資料=00000 00000..............................................30
圖 3-10 輸出波形,當輸入數位資料=011111 11111.............................................30
圖 3-11 輸出波形,當輸入數位資料=11111 11111.............................................31
圖 3-12 正負極性輸出電壓轉換曲線....................................................................31
圖 3-13 正極性INL...........................................................................................32
圖 3-14 負極性INL.............................................................................................32
圖 3-15 正極性DNL................................................................................................33
圖 3-16 負極性DNL................................................................................................33
圖 3-17 兩通道十位元DAC佈局圖.......................................................................50

第四章 壓控震盪器之設計................................................................................35
圖4-1 負迴授系統.................................................................................................36
圖4-2 反射式壓控振盪器示意圖......................................................................36
圖4-3 基本環形振盪器示意圖...................................................................37
圖 4-4 LC-tank振盪器等效電路...................................................................37
圖4-5 (a)理想輸出頻譜圖 (b)實際輸出頻譜圖.............................................38
圖4-6 Lesson′s相位雜訊模型........................................................................39
圖4-7 電流脈衝注入LC-tank振盪器示意圖..................................................40
圖4-8 脈衝訊號注入造成振盪訊號改變 (a)振幅 (b)相位...............................40
圖4-9 傳輸線共振器.............................................................................41
圖 4-10 在共振頻率之(a)VCO小信號模型(b)等效RLC示意圖..........................42
圖 4-11 互補式交連偶合對電路全圖.....................................................................42
圖 4-12 Q值模擬結果..............................................................................................43
圖 4-13 傳輸線電感值模擬結果.............................................................................43
圖 4-14 模擬電源供應偏移±0.2v對輸出頻率影響................................................44
圖 4-15 模擬TT.FF.SS三個corner對輸出頻率關係圖...........................................44
圖 4-16 模擬輸出頻譜圖 (Vcont = 0.9V) ...........................................................45
圖 4-17 模擬相位雜訊 (Vcont = 0.9V) ...............................................................45
圖 4-18 on wafer 輸出頻譜量測圖 (Vcont = 0.9V ) ............................................46
圖 4-19 on wafer tuning range量測 (18.97~20.58GHz) ........................................46
圖 4-20 PCB板量測輸出頻譜圖 (Vcont = 0.9V ) ................................................47
圖 4-21 PCB板量測相位雜訊 (Vcont = 0.9V) ......................................................47
圖 4-22 PCB板量測tuning range (18.917~20.763GHz) ......................................47
圖 4-23 佈局平面圖.................................................................................................49
圖 4-24 晶片照相圖.................................................................................................49
表目錄

表1-1 TN、STN、DSTN、TFT顯示裝置比較........................................................4
表3-1 預計規格表...........................................................................................34
表 4-1 模擬與量測規格比較表.......................................................................................48
參考文獻
[1] 陳連春著,“最新液晶應用技術,”建興出版社,pp.9,2001
[2] 松本正一、角田市良合著,劉瑞祥譯,“液晶的基礎與應用,”國立編譯館
[3] 顧鴻壽編著,“光電液晶平面顯示器(技術基礎及應用),”新文京開發出版
股份有限公司
[4] 92年度光電人才培訓計畫(顯示器驅動IC原理介紹)講義
[5] 經濟部工業局數位內容產業推動辦公室
[6] 戴亞翔著,“ TFT-LCD 面板的驅動與設計,”五南文化事業機構,2006
[7] 交大顯示科技研究所上課講義:TFTLCD面板設計實務
(Practice of TFT LCD Panel Design)-戴亞翔
http://www.di.nctu.edu.tw/ch/course/lecture.asp
[8] 交大顯示科技研究所上課講義:平面顯示器概論
(Introduction to Flat Panel Display )-謝漢萍
http://www.di.nctu.edu.tw/ch/course/lecture.asp
[9] Phillp E. Allen, Douglas R.Holber, “COMS Analog Circuit Design” Second Edition
[10] R. Jacob Baker “COMS Mixed-Signal Circuit Design ”
[11] D. B. Leeson, “A Simplified Model of Feedback Oscillator Noise Spectrum,” Proceedings of The IEEE, Vol. 42, February 1965, PP. 329-330.
[12] Ali Hajimiri and Thomas H. Lee, “Oscillator Phase Noise: A Tutorial,” IEEE
Journal of Solid-State Circuits, Vol.32, No. 3, March 2000, PP. 326 -336
[13] 黃秋皇,”2.4GHz CMOS RF Receiver For IEEE 802.11b/g WLAN Application,” 國立成功大學電機工程研究所碩士論文,民國九十二年
[14] 羅日隆,"使用0.18um CMOS 之2GHz 低相位雜訊壓控振盪器",東華大
學電機工程研究所碩士論文,民國九十三年六月。
[15] 黃胤年,”電波傳播與天線,”五南圖書出版公司,初版,2003
[16] 國立中興大學楊清淵教授編著教材,”射頻積體電路設計,” 2003
[17] Behzad Razavi , “RF microelectronics ,” 1998
[18] Behzad Razavi , “A 60-Ghz COMS Receiver Front-End,” IEEE J. Solid-State Circuit, vol. 41, no. 1, pp. 17-22, January 2006.
[19] Andress, W.F, Ham, D , “ Standing wave oscillators utilizing wave-adaptive tapered transmission lines,” IEEE J. Solid-State Circuit, vol. 40, no. 3, pp. 638-651, Mar. 2005.
[20] Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Namhoon Kim, Deog-Kyoon Jeong, Kim, W,“A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13μm CMOS” IEEE J. Solid-State Circuit, vol. 41, no. 4, pp. 638-651, April 2006.
[21] Arnoud P. van der Wel, Sander L. J. Gierkink, Robert C. Frye, Vito Boccuzzi, Bram Nauta, “A robust 43-GHz VCO in CMOS for OC-768 SONET applications,” IEEE J. Solid-State Circuit, vol. 39, no. 7, pp. 1159-1163, July April 2004.
[22] D. K. Shaeffer and S. Kudszus, “Performance optimized microstrip coupled VCOs for 40-GHz and 43-GHz OC-768 optical transmission,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1130–1138, Jul. 2003.
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