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研究生:謝岳霖
研究生(外文):Yue-Lin Hsieh
論文名稱:可程式化快速傅利葉電路之FPGA實作
論文名稱(外文):FPGA Implementation of Programmable FFT/IFFT
指導教授:魏學文魏學文引用關係
指導教授(外文):Shyue-Win Wei
學位類別:碩士
校院名稱:國立暨南國際大學
系所名稱:通訊工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:69
中文關鍵詞:可程式閘陣列反快速傅立葉轉換快速傅立葉轉換
外文關鍵詞:FPGAIFFTFFT
相關次數:
  • 被引用被引用:1
  • 點閱點閱:423
  • 評分評分:
  • 下載下載:87
  • 收藏至我的研究室書目清單書目收藏:0
本論文中,我們設計了一個可程式化FFT/IFFT電路去應變一系統有眾多種點數情況。在可程式化之FFT/IFFT電路中,使用的FFT演算法為混合Radix-2 DIF FFT與Radix-22 DIF FFT架構,電路設計則是使用Pipeline-based的 Single-path Delay Feedback(SDF)電路架構,電路中主要是利用SDF架構的規則性與重覆性,再搭配多工器來對輸入資料的路徑選擇,如此的做法,即可設計出一個只用簡單的控制電路就可切換FFT/IFFT點數規格的可程式化之FFT/IFFT電路,並以FPGA硬體實現以証明電路確實可行。
In this thesis, we designed the programmable FFT/IFFT circuit that can simultaneously meet one system have numerous kinds of size. In programmable FFT/IFFT, the FFT algorithm that used in this thesis mixed Radix-2 DIF FFT and Radix-22 DIF FFT, and this design used the Single-path Delay Feedback (SDF) hardware architecture on Pipeline-based. It mainly utilizes the property of regularity and repeats of the SDF architecture, and then chooses the path of inputting signal by Multiplexier. This method can finish the design of programmable FFT/IFFT that can switch FFT/IFFT size, only using simple control logic. Finally, as the result of detailed simulation,and adopt FPGA implementation to prove feasibility of the design
誌謝 i
中文摘要 ii
英文摘要 iii
圖目次 v
表目次 vii

第一章 前言 1
第二章 FFT演算法與硬體架構 3
2.1 離散傅立葉轉換(DFT) 3
2.2 快速傅立葉轉換(FFT) 3
2.2.1 Radix-2 DIT FFT演算法 4
2.2.2 Radix-2 DIF FFT演算法 8
2.2.3 Radix-4 DIF FFT演算法 12
2.2.4 Radix-22 DIF FFT演算法 19
第三章 可程式化之FFT/IFFT電路設計 25
3.1 MDC電路架構 25
A. R2MDC電路架構 26
B. R4MDC電路架構 27
3.2 SDF電路架構 28
A. R2SDF電路架構 28
B. R4SDF電路架構 29
3.3 Radix-22 Single-path Delay Feedback之電路架構 31
3.4可程式化之FFT/IFFT電路設計 39
第四章 可程式化之FFT/IFFT電路模擬與驗證 46
4.1模擬環境和發展平台 46
4.2可程式化之FFT/IFFT電路實現 47
4.2.1 Scrambler / Descrambler 48
4.2.2 Serial-to-Parallel(S/P)/ Parallel-to-Serial(P/S) 50
4.2.3 16-QAM mapping / de-mapping 52
4.2.4 FFT / IFFT 56
4.2.5 硬體實現之訊號量測 63
第五章 結論 67
參考文獻 68
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