臺灣博碩士論文加值系統

本論文針對應用於無線通訊系統之正交頻分多工（OFDM）技術，考量實作通訊系統傳輸的背景，包含通道、射頻以及傳輸規格，討論無線傳輸通道的影響效應和模型的建置方法、採用直接轉換的射頻架構所造成的非理想效應、基頻與射頻的相關介面討論，以及不同傳輸規格之設計考量。並針對無線區域網路所需之規範，提出相關之偵測、估計、同步、等化與解調等演算法及其效能分析，研究成果係針對不同通道與射頻效應所需，包含封包偵測（Packet Detection）、自動增益控制（AGC）、時脈偵測（Symbol Timing Detection）、載波頻率漂移（CFO）的估計與補償、通道的估計與等化、以及頻域上的相位追蹤等部分。在架構上提出以雙模座標旋轉數位計算器（CORDIC）為核心的設計，整合與簡化內部接收器（Inner Receiver）所需所有同步與等化之電路，針對多徑通道所造成的衰減效應，提出採用通道狀態資訊（CSI）之Demapping設計，有效降低所需的平均訊雜比以增加傳輸距離，並提出符合無線區域網路基頻的完整設計，從傳送端、前端接收器、內部接收器、FFT到外部接收器，有效降低全部的接收延遲至280 cycles，低於4個OFDM symbols的長度，以提高有效的傳輸量，經0.18um CMOS製程的cell library合成，共約42.4萬等效邏輯閘，且全部電路毋須使用RAM的設計，有利於未來整合於SOC的設計。在模擬與驗證考量上，提出以應用整合平台，模擬通道、射頻等環境，並納入Verilog實作電路的共同模擬，驗證實作系統的傳輸品質並有利於系統內部資料流與控制信號的偵錯工作，經由模擬與效能分析，以及實作系統針對傳輸品質與信號偵錯等驗證，得到8種實際電路的傳輸率及其效能結果，經由相關比較，可證實為高效能的設計以及其採用CSI對抗多徑通道的接收能力。

The dissertation presents a comprehensive design of OFDM transceiver for wireless applications, including system consideration, receiver technology, architecture, and evaluation. Wireless channel environments and RF nonideal effects have been considered for OFDM transmission. Novel methods for building wireless channel models have been introduced, including of delay spread interpolation and fader generators. The interface between baseband and RF, and the consideration over different transmission specifications have been also presented. For Wireless LAN system requirement, several receiver technologies are proposed for solving the effects caused from channels and RF environments, including packet detection, automatic gain control, symbol timing detection, detection and compensation of carrier frequency offset, channel estimation and equalization, and frequency-domain phase tracking. For implementing a baseband transceiver which accommodates to Wireless LAN systems, an architecture based on a dual-mode CORDIC module is proposed to integrate and reduce calculations of synchronization and equalization in the inner receiver; moreover, for some subcarriers suffering from severer attenuations under frequency-selective fading channels, a novel demapping method which adopts channel state information (CSI) and combines with OFDM equalizer is presented to decrease average SNR and increase transmission distance. The full implementation of baseband transceiver comprises transmitter, front-end processing, inner receiver, FFT/IFFT, and outer receiver, with total receiving latency as 280 clock cycles, less than 4 OFDM symbols duration, and with total complexity as about 424K equivalent gate count, benefiting in SOC integration by avoiding any usage of RAM components in the design. An integrated simulation platform is introduced with abilities to co-simulate channels and RF environments with practical Verilog codes for evaluating transmission performances over AWGN and multipath fading channels. According to simulation and evaluation results, 8 kinds of transmission rates with their required SNR and packet error rate (PER) are proposed and compared to prove the performance of the OFDM transceiver design.

摘要 i
Abstract ii
誌謝 iv
CHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 INTRODUCTION TO OFDM 3
1.2.1 DFT/IDFT and Over-sampling 5
1.2.2 Guard Interval and Cyclic Extension 7
1.2.3 Windowing 10
1.2.4 Polarity of Pilot Subcarriers 12
1.2.5 Signal Flow of OFDM Baseband Transceiver 12
CHAPTER 2 SYSTEM CONSIDERATION FOR WIRELESS OFDM TRANSCEIVERS 14
2.1 MULTIPATH FADING CHANNEL MODELS 15
2.1.1 Mathematical Channel Model 15
2.1.2 Simulation of Multipath Channel Models 18
2.1.3 Generation of Independent Fading Waveforms 27
2.1.4 Summary 37
2.2 RF FRONT-END 40
2.2.1 DAC and LPF 43
2.2.2 PA and PAPR 44
2.2.3 Frequency Synthesizer, CFO and Phase noise 48
2.2.4 VGA and AGC 51
2.2.5 ADC and DAC and SCO 53
2.2.6 Noise and System Link Analysis 55
2.2.7 RF Controller and Interface 58
2.2.8 Other Effects of Direct-conversion 58
2.3 PACKET-BASED OFDM SYSTEM 59
2.3.1 WLAN 802.11a Packet Format 60
2.3.2 UWB Packet Format 62
CHAPTER 3 TECHNOLOGY FOR PACKET-BASED OFDM RECEIVER 63
3.1 PACKET DETECTION AND AUTOMATIC GAIN CONTROL 63
3.1.1 Packet Detection Function 64
3.1.2 Digital Automatic Gain Control 79
3.2 SYMBOL TIMING DETECTION 82
3.3 CFO ESTIMATION AND COMPENSATION 88
3.4 CHANNEL ESTIMATION AND EQUALIZATION 91
3.5 PHASE TRACKING 94
3.6 PERFORMANCE ANALYSIS OF OFDM EQUALIZER OVER FADING CHANNELS 96
3.6.1 Fixed Channel Response 98
3.6.2 Rayleigh Fading Channel 104
CHAPTER 4 ARCHITECTURE FOR CORDIC-BASED OFDM RECEIVER 108
4.1 RECEIVER FRONT-END PROCESSING 111
4.2 CORDIC-BASED ARCHITECTURE 113
4.2.1 Design of Dual-mode CORDIC Module 113
4.2.2 Modified CSI-based Demapping 116
4.2.3 Other Considerations of Implementation 122
4.3 IMPLEMENTATION 124
CHAPTER 5 SIMULATION AND EVALUATION FOR OFDM TRANSCEIVER 126
5.1 SIMULATION AND EVALUATION ENVIRONMENT 129
5.2 SIMULATION RESULTS 131
5.3 HDL CO-SIMULATION 135
5.4 EVALUATION OF DESIGN PERFORMANCE 139
CHAPTER 6 CONCLUSIONS 142
6.1 SUMMARY 142
6.2 RECOMMENDATIONS FOR FUTURE WORKS 144

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