臺灣博碩士論文加值系統

本篇論文中討論如何在SOPC(System-on-a-Programmble-Chip)平台上進行一
個乙太網路矽智產整合的工作。SOPC 是由「內建常見元件的ASIC」與「可程
式化的PLD」兩個部份組成的晶片，能夠降低SOC 開發的複雜度，對系統評估
或SOC 的教學都有很大幫助。本研究使用Altera 公司的ARM-bsed Excalibur
SOPC 平台(EPXA1)，整合一個取自Opencore 的乙太網路介質存取控制器為實
例，對SOPC 的架構、開發方法，矽智產在匯流排上整合的工作、驅動程式撰寫
以及驗證的議題作討論，希望能作為SOPC 訓練的教材以及參考。

This research aims to discuss the integration of an 10/100 Ethernet MAC on a
System-on-a-Programmble-Chip. SOPC is a chip combined with “ASIC”(Application
Specific IC) and “PLD”(Programmable Logic Device). Due to the lower Complexity,
SOPC is suitable for SOC study in academic. In this research, Altera ARM-based
ExcaliburTM SOPC is used and an Opencore 10/100 Ethernet MAC is integrated onto
it. The topic of SOPC architecture, SOPC development flow, bus interface design of
the hardware, driver development and verification strategy of SOPC are discussed.
This work is hopeful to be referable material for school SOPC teaching.

第一章 緒論...............................................................................................1
1-1 研究背景........................................................................................................1
1-2 研究動機與目的............................................................................................2
1-3 相關文獻........................................................................................................2
1-3-1 SOPC Development Platforms in the Classroom.................................2
1-3-2 Excalibur Hardware Design Tutorial....................................................3
1-3-3 Excalibur Web Server Demonstration..................................................3
1-4 研究方法........................................................................................................4
1-5 論文貢獻........................................................................................................5
1-6 論文組織........................................................................................................6
第二章 SOPC平台架構介紹...................................................................7
2-1 ARM-based ExcaliburTM SOPC Architecture..................................................7
2-1-1 Stripe ....................................................................................................8
2-1-2 PLD ....................................................................................................11
2-2 Create ARM922T-EPXA1 Development Kit ................................................12
2-2-1 Create ARM922T-EPXA1 Daughter Board .......................................12
2-2-2 Creator Mother Board ........................................................................13
第三章 SOPC平台使用方法及工具.....................................................14
3-1 SOPC 的開發流程........................................................................................14
3-2 硬體開發工具(H/W Development Related Tools) ......................................16
3-2-1 使用MegaWizard 設定Stripe參數.................................................16
3-2-2 使用QuartusⅡ編輯及合成電路.....................................................18
3-3 軟體開發工具(S/W Development Related Tools) .......................................20
3-3-1 使用ARM Compiler編譯程式.........................................................20
3-4 軟硬體結合工具(Flash Image Generation Tools) .......................................22
3-4-1 使用Altera Utility產生軟硬體整合之物件檔(object) ....................22
3-4-2 使用ARM Linker 產生Flash Image ................................................23
第四章 Opencore 10/100 Ethernet MAC介紹....................................26
4-1 Ethernet MAC 介紹.......................................................................................26
4-2 Opencore 10/100 Ethernet MAC 介面訊號..................................................27
第五章 10/100 Ethernet MAC硬體整合工作.....................................31
5-1 工作介紹......................................................................................................31
5-2 AHB匯流排協定..........................................................................................33
5-2-1 MAC 在匯流排中的角色—Master和Slave....................................34
5-2-2 Bridge與PLD之間的訊號..............................................................35
5-2-3 匯流排傳輸時序...............................................................................39
5-3 Opencore 10/100 Ethernet MAC 匯流排介面訊號修改..............................41
5-3-1 WISHBONE的Handshake協定......................................................41
5-3-2 Remove unused WISHBONE of Ethernet MAC...............................43
5-4 AHB Master BIU Design...............................................................................44
5-4-1 Step1：定義Master BIU的訊號......................................................45
5-4-2 Step2：畫出Master BIU的電路行為波形圖..................................45
5-4-3 Step3：設計Master BIU的狀態機..................................................46
5-5 AHB Slave BIU Design.................................................................................47
5-5-1 Step1：定義Slave BIU的訊號........................................................47
5-5-2 Step2：畫出Slave BIU的電路行為波形圖....................................48
5-5-3 Step3：設計Slave BIU的狀態機....................................................49
5-6 實際將電路整合到系統中..........................................................................50
第六章 10/100 Ethernet MAC軟體驅動程式開發.............................54
6-1 Boot Loader ...................................................................................................54
6-1-1 Boot Loader的工作...........................................................................54
6-1-2 使用Altera Library為系統加入Boot Loader.................................54
6-2 PHY Device Driver........................................................................................55
6-3 MAC Device Driver ......................................................................................55
6-3-1 訊框描述者(Buffer Descriptor) ........................................................55
6-3-2 Ethernet MAC 控制暫存器...............................................................59
第七章 驗證及實驗結果........................................................................63
7-1 Opencore 10/100 Ethernet MAC 的RTL行為驗證.....................................64
7-1-1 Rx RTL行為驗證..............................................................................64
7-1-2 Tx RTL行為驗證..............................................................................65
7-2 MAC SIP 與AHB BIU 結合之RTL行為驗證...........................................66
7-2-1 Slave的RTL行為驗證.....................................................................66
7-2-2 Master的RTL行為驗證..................................................................66
7-3 ARM-based Excalibur SOPC 發展板上驗證...............................................66
7-3-1 Verify PHY.........................................................................................68
7-3-2 Vefify MAC + PHY............................................................................68
7-3-3 Vefify S/W + MAC + PHY ................................................................69
7-3-4 電路面積與電路速度.......................................................................72
第八章 結論及未來展望........................................................................74
參考文獻...................................................................................................75
附錄B MegaWizard的操作...............................................................78
附錄C Create-EPXA1 Pin腳指定表.................................................82

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[3]. “Excalibur Web Server Demonstration,” Altera Inc, 2003
[4]. www.opencore.org, “Opencore 10/100 Ethernet MAC”.
[5]. www.altera.com, “Excalibur EPXA1 Devices”.
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Synthesis-Optimized, Glitch-Free Outputs” SNUG, 2000
[13]. Quartus Handbook, Altera Inc, 2005
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