臺灣博碩士論文加值系統

本論文的第一部份提出一個使用電荷回收機制之低電壓傳送器，內含一個低電壓差動傳送器電路與電荷回收再利用電路。使用低電壓差動訊號對來達到低功率與得到高抗雜訊能力，並利用電荷回收策略來回收電荷再利用，更進一步降低功率消耗。
第二部份則為適用於數位電視地面廣播系統( digital video broadcasting over terrestrial, DVB-T )接收器中編碼正交分頻多工解調器( Coded orthogonal frequency division multiplex demodulation, COFDM demodulation )，能對抗訊號頻率飄移，並能動態調整快速傅立葉轉換處理器輸入訊號框架來同步訊號起點，並執行2K/8K兩種解調模式。此解調器的方塊主要可分為四個主要部份：時間同步修正、頻率同步修正、雙模2K/8K快速傅立葉轉換處理器與通道估測修正。

The first topic of this thesis presents a bus driver design which is based on a charge recycle technique. The proposed design is mainly composed of a differential low swing circuit and a charge recycling circuit. The differential low swing signaling has been adopted to achieve low power and robust data transmission. The charge recycle is utilized to reduce power dissipation on long lines for the differential low swing signaling.
The second topic is the coded orthogonal frequency division multiplex demodulation (COFDM) demodulator compliant with the European digital video broadcasting over terrestrial (DVB-T). It can recover the frequency offset of COFDM signal and dynamically select the FFT stages to synchronize the start of a symbol. The proposed design mainly contains four blocks : a time synchronization block, a frequency synchronization block, a 2K/8K FFT processor, and a channel estimation block.

摘 要 i
Abstract ii
第一章 前言與簡介 1
1.1 前言 1
1.2 文獻探討 2
1.2.1 使用電荷回收機制之低電壓傳送器 2
1.2.2 適用於DVB-T之編碼正交分頻多工解調器 3
1.3 論文大綱 5
第二章 使用電荷回收機制之低電壓傳送器 6
2.1 簡介 6
2.2 電路架構與原理說明 6
2.2.1 低電壓傳送器 6
2.2.2 電荷回收機制 9
2.2.3 功率消耗分析 11
2.3 模擬結果 12
2.4 量測結果與討論 19
第三章 適用於DVB-T之編碼正交分頻多工解調器 25
3.1 簡介 25
3.2 原理與架構說明 25
3.2.1 時間同步修正 27
3.2.2 頻率同步修正 29
3.2.3 雙模2K/8K快速傅立葉轉換處理器 33
3.2.4 通道估測修正 36
3.2.5 整體系統架構實現 38
3.3 模擬結果 39
3.4 量測結果與討論 46
第四章 結論與成果 50
參考文獻 52

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