臺灣博碩士論文加值系統

本論文係利用TSMC 0.18um 1P6M CMOS製程來研製應用於5GHz無線區域網路之直轉式發射機。在升頻規劃上，基頻為10MHz經本地振盪器(5.24GHz)混頻調變後升至高頻帶5.25GHz。參考WLAN規範，因應系統高線性度、低相位雜訊、高工作頻率等特性，設計射頻前端發射電路。部分晶片電路採用打鎊線到FR-4基板上進行量測。四相位壓控振盪器輸出所得頻率可調範圍為360MHz，相位雜訊分別為-87dBc/Hz@100KHz和-113.7dBc/Hz@1MHz。I/Q調變電路所得之轉換增益可達15dB，雜訊指數為12.8dB，輸入P1dB為-26dBm，OIP3為0dBm，隔離度皆小於-60dB以下，最後所獲得的頻帶訊號(5.25GHz)與鏡像單邊頻帶訊號(5.23GHz)大小差距可達35dB。平衡式功率放大器所得功率增益約為11.3dB，最高效率可達45%，最大輸出功率可達25.4dBm，OIMD可高達約35dBc以上，並且成功實現了當其中一顆功率放大器損壞時，功率降低6dB之應用。而整合之發射機頻帶涵蓋範圍可由5.15~5.35GHz，所得之功率增益約為45dB，OIP3約可達69dB，最後所得之IMD可達26dBc@300KHz。

This thesis presents the development of 5GHz U-NII band CMOS RFICs for the 802.11a WLAN direct conversion transmitter in TSMC standard 0.18um CMOS technology. The developed 5GHz RFICs include the Balance Power Amplifier, I/Q modulator mixer and quadrature VCOs. The base band frequency is 10MHz of the LO frequency and RF frequency are 5.24GHz and 5.25GHz, respectively. The measurements are performed by using FR-4 PCB test fixture. The Quadrature VCO has 360MHz tuning range. The phase noise is -87dBc/Hz@100KHz and -113.7dBc/Hz@1MHz. The I/Q modulator mixer has 15dB conversion gain, 12.8dB noise figure and -26dBm P1dB with the output third-order intercept point is 0dBm. Isolation can reach -60dB. The power of signal sideband (5.25GHz) is 35dB higher than the unwanted sideband (5.23GHz). The BPA has 11.3dB power gain, 25.4dBm output power and 45% power efficiency. The output inter-modulation distortion is above 35dBc. Finally, the integrated transmitter can be operated between 5.15GHz and 5.35GHz. The power gain for this transmitter is 45dB, OIP3 and IMD are 69dB and 26dBc@300KHz, respectively.

第一章 緒論 1
第二章 無線通訊之系統架構 5
2.1前言 5
2.2 差外差式架構(Super-Heterodyne) 5
2.3 直轉式架構(Direct Conversion or Homodyne) 8
2.3.1 DC Offset and LO Leakage 8
2.3.2 I/Q Mismatch 10
2.3.3 Even-Order Distortion 11
2.3.4 Flicker Noise 12
2.4 鏡像抑制式架構(Image-Reject) 13
2.4.1 Hartley Image Reject 13
2.4.2 Weaver Image Reject 14
2.5 系統架構比較表 15
第三章 微波射頻原理 16
3.1 靈敏度(Sensitivity) 16
3.2 動態範圍(Dynamic Range) 18
3.3 非線性效應(Effects of Nonlinearity) 19
3.3.1 1dB增益壓縮(Gain Compression) 19
3.3.2 諧波失真(Harmonic Distortion) 20
3.3.3 交互調變失真(Inter-modulation Distortion ; IMD) 21
3.3.4 AM/AM與AM/PM 23
3.3.5 頻譜再生(Spectral Regrowth) 23
3.4 串接系統(Cascaded System) 24
3.4.1 雜訊指數分析(Noise Figure) 24
3.4.2線性度分析(linearity) 26
3.5 穩定度分析(Stability Analysis) 28
3.5.1射頻穩定度分析 28
3.5.2偏壓(bias)與級間(inter-stage)穩定度分析： 32
3.6 Bond-Wire和PAD寄生效應考量 33
3.7 網路的選擇 33
3.7.1 De-Cap網路 34
3.7.2低通匹配網路 34
第四章 正交四相位壓控振盪器 36
4.1 簡介 36
4.2 振盪原理 37
4.2.1一般分析法 37
4.2.2 微波分析法 38
4.3 環形振盪器與LC tank壓控振盪器 42
4.3.1環形振盪器(Ring Oscillator) 42
4.3.2 LC tank 壓控振盪器 42
4.4 相位雜訊(Phase noise) 45
4.4.1 相位雜訊之定義 45
4.4.2 相位雜訊對通訊系統的影響 48
4.5設計正交四相位壓控振盪器 49
4.6設計結果 52
4.6.1 一般考量 53
4.6.2 特殊考量 55
4.6.3 預計規格表 57
4.6.4 測試考量 57
4.6.5 正交四相位壓控振盪器佈局 58
4.7問題與討論 59
第五章 交叉升頻混頻器 60
5.1 簡介 60
5.2 混頻器架構 61
5.2.1被動式混頻器 61
5.2.2單端平衡式混頻器(Single-balanced mixer) 61
5.2.3吉爾伯特混頻器(Gilbert mixer) 63
5.2.4交叉式混頻器 64
5.2.5架構比較表 68
5.3 設計交叉升頻混頻器 68
5.3.1產生I/Q訊號之考量 68
5.3.2電流再生技術之應用 69
5.4設計結果 71
5.4.1 一般考量 71
5.4.2 預計規格表 74
5.4.3 測試考量 74
5.4.5 交叉升頻混頻器佈局 75
5.5 問題與討論 76
5.6量測結果 77
5.6.1模擬與量測結果比較 77
5.6.2量測結果之問題與討論 79
第六章 平衡式Class E功率放大器 80
6.1 簡介 80
6.2 功率放大器的分類 81
6.2.1線性功率放大器 81
6.2.2非線性功率放大器 86
6.2.3各類放大器的比較 86
6.3 Class E類功率放大器原理 87
6.3.1工作原理 87
6.3.2獲得最佳效率之方法 88
6.3.3數學模型 90
6.4設計Class E放大器 96
6.4.1 Model建立 96
6.4.2 Wilkinson微波電路 97
6.4.3設計流程 100
6.5設計結果 101
6.5.1 Transient 101
6.5.2 S-Parameter Analysis 102
6.5.3 One-Tone Analysis 103
6.5.4 Two-Tone Analysis 104
6.5.5 系統考量 104
6.5.6 預計規格表 105
6.5.7 測試考量 105
6.5.8 平衡式Class E功率放大器佈局 107
6.6 問題與討論 108
第七章 5GHz無線發射機 109
7.1 簡介 109
7.2設計結果 110
7.2.1 Envelop Analysis 110
7.2.2 S-Parameter Analysis 111
7.2.3 One-Tone Analysis 112
7.2.4 Two-Tone Analysis 112
7.2.5 頻寬範圍 113
7.2.6 預計規格表 114

1. Masoud Zargari et al, “A 5-GHz CMOS Transceiver for IEEE 802.11a Wireless LAN Systems”, IEEE Journal of Solid-State Circuit, Vol. 37, no. 12, pp. 1688-1694, Dec, 2002.
2. Proxim White Paper – 802.11a : A Very High-Speed Highly Scalable Wireless LAN Standard, 2002.
3. IEEE Std 802.11a / D7.0-1999, Part11: Wireless LAN Medium Access Control (MAC) and Physical Layer(PHY) specifications: High Speed Physical Layer in the 5GHz Band.
4. Agilent Advanced RFIC Design Seminar 2004, Wireless LAN Transceiver Design and Verification : An Integrated Methodology for System and Circuit Design in the Cadence IC Design Flow.
5. 電子設計資源網, 無線通訊主流元件剖析射頻積體電路設計.
6. B. Razavi, RF Microelectronics, Prentice Hall, pp.129~138, 1998.
7. CIC教育訓練課程, Basic Concepts In RF Design, 2004.
8. 94年度通訊科技人才培育先導型計畫,射頻電路與RFIC基礎.
9. R. Hartley, “Modulation System,” U.S. Patent 1,666,206, April 1928.
10. D. Weaver, "A Third Method of Generation and Detection of Single-Sideband Signals," Proc. IRE, vol. 44, Dec, pp.1703 ~ 1705, 1956.
11. Tai-Cheng Lee, Receiver Architectures in Modern Wireless Communications, 2004.
12. IEEE Std 802.11a/D7.0-1999, Part11: Wireless LAN Medium Access Control (MAC) and Physical Layer(PHY) specifications: High Speed Physical Layer in the 5GHz Band.
13. R.V. Nee and R. Prasad, OFDM Wireless Multimedia Communication, Artch House, 2000.
14. Tian-Wei Huang, Power Amplifier Design for Wireless Communications, 2006.
15. Stephen A. Maas, Practical RF Circuit Design For Modern Wireless Systems, vol II, Artech House, pp. 274-276, 2003.
16. Guillermo Gonzalez, Microwave Transistor Amplifiers Analysis and Design, Second Edition, Prentice Hall, pp. 299-322, 1997.
17. J. M. Rollett, “Stability and power gain invariants of linear two-ports”, IRE Trans. Circuit Theory, vol. CT-9, pp. 29-32, Mar. 1962.
18. M. L. Edwards and J. H. Sinksy, “A New Criteria for Linear 2-Port Stability Using a Single Geometrically Derived Parameter”, IEEE Trans. Microwave Theory and Techniques, vol. MTT-40, pp. 2803-2811, Dec, 1992.
19. Lorene Samoska et al, “On the Stability of Millimeter-Wave Power Amplifiers”, IEEE MTT-S Digest, pp. 429~432, 2002.
20. K. Mouthaan et al, “Microwave modelling and measurement of the self- and mutual inductance of coupled bondwires”, Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting, pp. 166-169, Sep, 1997.
21. Federico Alimenti, Paolo Mezzanotte, Luca Roselli, Roberto Sorrentino, “Modeling and characterization of the bonding-wire interconnection”, IEEE Transactions on Microwave Theory and Techniques, vol. 49, no.1, pp. 142-150. Jan, 2001.
22. Rofougaran, J. Y.-C. Chang M. Rofougaran and A. A. Abidi, “A 1GHz CMOS RF Front-End for a Direct-Conversion Wireless Receiver,” IEEE J. of Solid-State Circuits, vol.21, No. 7, pp. 880-889, July 1996.
23. Mark I. Montrose, EMC and the Printed Circuit Board: Design, Theory, and Layout Made Simple, IEEE Press, pp. 129-136, 1999.
24. Steve C. Cripps, RF power amplifiers for wireless communications, Artech House, pp. 74-84, 1999.
25. Behzad Razavi, RF Microelectronics, Prentice Hall, pp. 122-146, 1998.
26. Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hall, pp. 345-348, 2001.
27. Guillermo Gonzalez, Microwave Transistor Amplifiers Analysis and Design, Second Edition, Prentice Hall, pp. 388-399, 1997.
28. 94年度通訊科技人才培育先導型計畫,射頻電路與RFIC基礎.
29. Leeson, D. B., “A Simple Model of Feedback Oscillator Noise Spectrum,” Proc. IEEE, vol 54(2), pp. 329–330, 1966.
30. Lee, T. H. and Hajimiri, A, “Oscillator Phase Noise; A Tutorial,” IEEE J. Solid-State Circuits, vol. 35, March, 2000.
31. Jian-Zhong Chen, Basic Architecture of a Cellphone Transceiver (Direct Conversion), Lecture in ntou course, Oct, 2004.
32. Hegazi E., Sjoland H. and Abidi A. A., “A Filtering Technique to Lower LC Oscillator Phase Noise,” IEEE J. Solid-State Circuits, pp. 1921-1930, Dec, 2001.
33. Pietro Andreani, Member, “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE J.Solid-State Circuits, vol. 37, pp.1737-1747, April, 2002.
34. 李俊毅, “射頻四相位壓控振盪器”,國立成功大學碩士論文, 2003.
35. Hye-Ryoung Kim, Choong-Yul Cha, “A very low-power quadrature VCO with back-gate coupling,” IEEE J.Solid-State Circuits, vol. 39, pp.952-955, March, 2004.
36. CIC教育訓練課程, MMIC Design, 2004.
37. Behzad Razavi, RF Microelectronics, Prentice Hall, pp. 185-188, 1998.
38. B.Gilbert, “A Precise Four Quadrant Multiplier with Subnanosecond Response,” IEEE J. Solid-State Circuits, vol. SC-3, pp. 365-373, Dec. 1968.
39. Behzad Razavi, “RF Transmitter Architectures and Circuits,” IEEE 1999 Custom integrated circuits conference, pp.197-204, 1999.
40. David M. Pozar, “Microwave Engineering,” Third Edition, pp. 333-356, 2004.
41. Karanicolas et al., “A 2.7-V 900-MHz CMOS LNA and mixer,” IEEE J.Solid-State Circuits, vol. 31, no. 12, pp. 1939-1944, Dec. 1996.
42. Vojdan Vidofkovic, “A low-voltage folded-switching mixer in 0.18-spl mum CMOS,” IEEE J.Solid-State Circuits, vol. 40, no. 6, pp. 1259-1264, June, 2005.
43. Nathan O. Sokal and Aland D. Sokal, “Class E-A New Class of High-Efficiency Tuned Single-Ended Switching Power Amplifiers,” IEEE Journal of Solid-State Circuits, vol. SC-10, pp. 168-176, Jun. 1975.
44. Steve C. Cripps, “RF Power Amplifiers for Wireless Communications,” Artech House, pp. 46-54, Mar. 1999.
45. C. Duvanaud, S. Dietsche, G. Pataut, and J. Obregon,“High-Efficiency Class F GaAs FET Amplifiers Operating with Very Low Bias Voltages for Use in Mobile Telephones at 1.75GHz,” IEEE Microwave and Guide Wave Letters, Vol. 3, pp. 268-270, Aug. 1993.
46. Frederick H. Raab,“Class-F Power Amplifiers with Maximally Flat Waveforms,” IEEE Trans. On MTT, vol. 45, pp. 2007-2012, Nov. 1997.
47. Sowlati T, Salama CA, Sitch J, Radjohn G, Smith D, “Low voltage, high efficiency GaAs class-E power amplifiers for wireless transmitters,” IEEE Journal of Solid-State Circuits, pp. 1074-1080, 1995.
48. Andrei Grebennikov, “Class E High-Efficiency Power Amplifiers : Historical Aspect and Future Prospect,” Microwave & Wireless Magazine, pp. 64-71, Aug. 2002.
49. Guillermo Gonzalez, “Microwave Transistor Amplifiers Analysis and Design”, Second Edition, Prentice Hall, pp. 327-333, 1997.
50. H. Raab, “RF and Microwave Power Amplifier and Transmitter Technologies – Part 3”, High Frequency Electornics, pp. 31-48, September, 2003.