臺灣博碩士論文加值系統

本論文描述如何設計四相位壓控振盪器，主要分成二個部分，第一個部分為新式低功耗之變壓器耦合技巧四相位壓控振盪器，使用UMC 0.18um CMOS 1P6M製程。其架構利用了電流再利用電路型式與變壓器耦合產生四相位訊號的技巧，使其具有低功率消耗的特性，工作電壓為1.8V，可調變頻率為2.04GHz~2.2GHz；第二部份為討論背閘極耦合式四相位壓控振盪器，其製作使用了TSMC 0.18um CMOS 1P6M製程，架構中使用了平衡式壓控振盪器型式，並利用背閘極耦合技巧產生四相位訊號，工作電壓為1.8V，可調變頻率為5.26GHz~5.59GHz。經Cadence 中的Spectre RF 電路模擬軟體的驗證，朝著低相位雜訊和低功率消耗來設計。

Design of Quadrature Voltage-Controlled Oscillator (QVCO) will be investigated in this thesis. This thesis is mainly composed of two topics, the first is the novel low power based on transformer-coupled technique quadrature VCO, the chip is fabricated by the UMC 0.18um 1P6M CMOS technology. The structure uses the current-reused topology and transformer coupled technique to generate quadrature signal, and it can achieve low power characteristic. The operation voltage is 1.8V and tuning range is 2.04GHz~2.2GHz. The second is the quadrature VCO using back-gate coupled method. The chip is fabricated by the TSMC 0.18um 1P6M CMOS technology. The structure uses balanced-VCO topology and body-coupled method to generate quadrature signal. The operation voltage is 1.8V and tuning range is 5.26GHz~5.57GHz. From the simulation results with Cadence Spectre RF, the design has been done with the goal of low phase noise and low power consumption.

中文摘要 I
ABSTRACT II
誌謝 III
CONTENTS IV
LIST OF FIGURES VII
LIST OF TABLES XI
CHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 ORGANIZATION OF THIS THESIS 2
CHAPTER 2 FUNDAMENTAL OF THE VCO 3
2.1 INTRODUCTION 4
2.2 OSCILLATOR THEORY 4
2.3 PARAMETERS OF VCO’S 7
2.3.1 Q of an Oscillator 7
2.3.2 The Parameters of Design VCO’s 9
2.4 PHASE NOISE 13
2.4.1 Thermal Noise 13
2.4.2 Flicker Noise 15
2.4.3 Effect of Phase Noise in RF Communications 16
2.4.4 Definition 18
CHAPTER 3 DESIGN OF VOLTAGE-CONTROL OSCILLATOR 21
3.1 VCO TOPOLOGIES 21
3.1.1 One-transistor Oscillator 21
3.1.2 LC tank oscillator architecture 24
3.1.3 Cross-Coupled Differential Oscillator 26
3.1.4 Colpitts Oscillator 28
3.2 INDUCTOR 31
3.2.1 Spiral Inductor 31
3.2.3 Transformer 33
3.3 VARACTORS 36
3.3.1 MOS Varactor 36
3.3.2 Parasitic Resistance 37
3.3.3 Inversion-Mode and Accumulation-Mode MOS Capacitors 38
CHAPTER 4 THE TWO QUADRATURE CMOS VCOS 42
4.1 INTRODUCTION 42
4.2 QUADRATURE VCO TOPOLOGIES 42
4.2.1 The Conventional QVCO 43
4.2.2 Quadrature through Back-gate Coupling 45
4.2.3 Quadrature through Superharmonic Coupling 47
4.3 CURRENT REUSED VCO TOPOLOGIES 51
4.3.1 Current Reused Differential LC VCO 51
4.3.2 Current Reused Quadrature VCO 53
4.4 THE NOVEL CURRENT REUSED QUADRATURE VCO BASED ON TRANSFORMER-COUPLED TECHNIQUE 54
4.4.1 Introduction 54
4.4.2 QVCO Circuit Design 55
4.4.3 Transformer Layout 58
4.4.4 Measurement Results 59
4.5 A 5.2GHZ QUADRATURE VCO WITH THE BACK-GATE COUPLING METHOD 64
4.5.1 Introduction 64
4.5.2 Balance VCO structure 65
4.5.3 QVCO Circuit Design 66
4.5.4 Measurement Results 67
CHAPTER 5 CONCLUSION 71
REFERENCES 72

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