臺灣博碩士論文加值系統

本論文深入探討一個使用本體推動(bulk-driven)技術，且工作於次臨界區(subthreshold)之MOSFET元件的低工作電流、低輸入電壓、高增益、低功率損耗及低雜訊的特性，應用此特性於低電壓、低電流之微功率運算放大器之設計，同時使用源極交叉耦合對(Source Cross-Coupled Pair)於差動輸入端，有效地降低靜態電流，使得放大器能達到更低功率損耗的效果，同時電路中亦驗證了工作於次臨界區具有如BJT補償正溫度係數的效果，可以改善放大器偏壓對溫度的變動率。本電路設計經由HSPICE以TSMC 0.18μm技術模擬的結果，可以得到在VDD=0.6V之電壓供給，消耗功率低於10μW及70dB的開回路增益。本體推動之CMOS元件工作於次臨界區確實可設計於低電壓、低功率之運算放大器。

This thesis deeply investigate the characteristics of a MOSFET device using the bulk-driven technique to operate in subthreshold region for low current, low input voltage, high open loop gain, low power consumption, and low noise. It can used to design the low voltage amplifier to improve the limitation for the VGS voltage and the saturation voltage within the amplifier. The low voltage and current micro-operation amplifier is applied, and the source cross-coupled pair is used within the differential input, the static current of the amplifier is effectively reduced. The variation of amplifier for the supplied voltage to the temperature is improved by operated in the subthreshold region. Using HSPICE to simulate the characteristic of the micro-operation amplifier for the TSMC 0.18μm CMOS technology is verified. As the result shown that VDD= 0.6, power consumption< 10μW, open loop gain= 70dB. The used bulk-driven CMOS device in subthreshold is exactly deigned in the operation amplifier for low-voltage and low-power.

目 錄
誌謝 i
中文摘要 ii
英文摘要 iii
目錄 iv
表列 vi
圖列 vii
第一章 緒論
1.1 研究動機、目的 1
1.2 積體電路的背景、元件與應用 3
第二章 本體推動(Bulk-Driven)之原理與應用
2.1 金氧半導體(MOSFET)之臨界電壓控制 5
2.1.1 基底效應(Body Effect) 9
2.2 接面場效應電晶體(JFET) 12
2.2.1 JFET的結構 12
2.2.2 JFET的操作 14
2.3 本體推動(Bulk-Driven)原理與應用 20
第三章 次臨界區(Subthreshold region)之原理與應用
3.1 次臨界區的條件 27
3.2 次臨界區與飽和區的電流影響 32
第四章 微型運算放大器電路設計
4.1 源極交叉耦合對的設計原理與方法 44
4.2 工作於次臨界區本體推動之低電壓低電流微型運算放
大器 46
4.3 操作在次臨界區的偏壓電路 56
第五章 結論
5.1 結論 61
參考文獻 63

參考文獻
[1] 莊達人， ”VLSI製造技術”，高立圖書，2001.
[2] P. E. Allen and D. R. Holberg, “CMOS Analog Circuit Design,” Qxford University Press, Second Edition, 2002.
[3] S. S. Rajput and S.S. Jamuar, “Low Voltage Analog Circuit Design Techniques,” Circuit and System Magazine, IEEE, vol.2, Issue: 1, pp.24-42, 2002.
[4] R. Hogervorst and J. H. Huijsing, “Design of Low Voltage, Low Power Operational Amplifier Cells,” Kluwer Academic Publishers, 1996.
[5] B. Razavi, “Design of Analog CMOS Integrated Circuit,” McGraw Hill, International Edition, 2001.
[6] D. A. Neamen, “Semiconductor Physics and Device,” Third Edition, McGraw Hill, 2003.
[7] S. M. Sze, “Semiconductor Device, Physics and Technology,” 2nd , New York, Wiley, 2001.
[8] B. G. Streetman and S. Banerjee, “Solid State Electronic Device,” Fifth Edition, Prentice Hall, 2000.
[9] D. A. Johns and K. Martih, “Analog Integrated Circuit Design,” John Wiley, 1996.
[10] Y. Haga, H. Z. Hoseini, L. Berkovi, and I. Kale, “Design of A 0.8Volt Fully Differential CMOS OTA Using the Bulk-Driven Technique,” IEEE Circuits and Systems, vol. 1, pp: 220-223, 2005.
[11] F. A. Levinzon, “Noise of the JFET Amplifier,” IEEE Transactions on Circuits and System, vol. 47, NO. 7, pp: 981-985, July. 2000.
[12] B. J. Blalock and P. E. Allen, “A Low-Voltage, Bulk-Driven MOSFET Current Mirror for CMOS Technology,” Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium , vol. 3, pp: 1972-1975, 1995.
[13] A. S. Sedra and K. C. Smith, “Microelectronic Circuits,” Fifth Edition, Oxford, New York, 2004.
[14] R. T. Howe and C.G. Sodini, “Microelectronics An Integrated Approach,” International Edition, Prentice Hall, 1997.
[15] K. Lasanen, E. R. Ruotsalainen, J. Kostamovaara, “A 1-V 5μW CMOS-Opamp with Bulk-Driven Input Transistor,” Proc. 43rd IEEE Midwest Symp. on Circuit and System, pp: 1038-1041, Aug 2000.
[16] L. Yong, “Complementary Body-driving A Low-Voltage Analog Circuit Technique Realized In 0.35μm SOI Process,” The University of Tennessee, Knoxville, Aug 2002.
[17] R. J. Baker, “CMOS Circuit Design, Layout, and Simulation,” Oxford University Press Second Edition, Wiley -Interscience 2005.
[18] I.Grech, J. Micallef, G. Azzopardi, and C. J. Debono, “A 0.9V Wide-Input-Range Bulk-Driven CMOS OTA for Gm-C Filters,” Electronics, IEEE Circuits and System, vol. 36, pp: 1082-1086, July 2001.
[19] J. Rosenfeld, M. Kozak, and E. G. Friedman, “A Bulk-Driven CMOS OTA with 68dB DC Gain,” Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference, pp: 5-8, Dec. 2004.
[20] G. Giustolisi, G. Palumbo, M. Criscione, and F. Cutri, “A Low Voltage Low Power Voltage Reference Based on Subthreshold MOSFETs,” IEEE Journal of Solid State Circuits, vol. 38, NO. 1, pp: 151-154, January 2003.
[21] R. R. Harrison, “MOSFET Operation in Weak and Moderate Inversion,” University of Utah.
[22] P. R. Gray, P. J. Hurst, S. H. Lewis, and P. G. Meyer, “ Analysis and design of Analog Integrated Circuit,” John Wiley, 2000.
[23] M. H. Chowdhury and Y. I. Ismail, “ Analysis of Coupling Noise in Dynamic Circuit”, Proceedings of The 3rd IEEE International Workshop on System-On-Chip For Real-Time Applications, IEEE, pp: 320-325, 2003.
[24] A. E. Buck, C. L. McDonald, S. H. Lewis, and T. R. Viswanathan “A CMOS Bandgap Reference Without Resistors,” IEEE Journal of Solid-State Circuit, vol. 37, NO. 1, pp: 81-83, January 2002.
[25] Y. Jiang and E. K. F. Lee, “Design of Low-Voltage Bandgap Reference Using Transimpedance Amplifier,” IEEE Trans. Circuits Syst. 2, vol. 47, pp: 552-555, June 2000.
[26] R. Rao, A. Srivastava, D. Blaauw, and D. Sylvester, “Statistical Analysis of Subthreshold Leakage Current for VLSI Circuits,” IEEE Transactions on Very Large Scale Integration Systems, vol. 12, NO. 2, pp: 131-139, Feb. 2004.
[27] R. R. Harrison, “ MOSFET Operation in Weak and Moderate Inversion,” University of Utah.
[28] Y. P. Tsividis and R. W. Ulmer, “A CMOS voltage reference,” IEEE J. Solid-State Circuits, vol. SC-13, pp:774-778, Dec. 1978.
[29] 胡振國，金氧半電容元件，2005.