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研究生:施銘憲
研究生(外文):Ming-Hsien Shih
論文名稱:5.8GHzRFID之射頻前端接收器設計
論文名稱(外文):Design of a front-end of a 5.8GHz RFID receiver
指導教授:陳文山陳文山引用關係
指導教授(外文):Wen-Shan Chen
學位類別:碩士
校院名稱:南台科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:94
語文別:中文
論文頁數:77
中文關鍵詞:無線射頻辨識系統射頻前端接收器矽鍺製程
外文關鍵詞:RFIDreceiverSiGe
相關次數:
  • 被引用被引用:4
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  • 評分評分:
  • 下載下載:203
  • 收藏至我的研究室書目清單書目收藏:2
RFID的應用已成為現在的趨勢,然而目前採用的頻帶大多在UHF與2.45GHz附近,應用方面為收費系統、身分辨識、悠遊卡、物流控管…等等。在本論文中,我們預計設計的RFID頻率為5.8GHz,應用於醫療科研,而學生負責的部份為讀取器之接收端電路。製程採用SiGe-0.35製程,電路模擬部份則利用台灣積體電路有限公司(TSMC)所提供之模型經ADS模擬與設計,並且經CIC下線至TSMC。本論文將依序介紹接收器電路之LNA、MIXER以及VCO,LNA與MIXER部份有實際下線之晶片,VCO之研究則經由ADS做模擬。
The applications of RFID have been already became the present trend, and frequency bands adopted at present are mostly near UHF and 2.45GHz. The applications of RFID include the electronic toll collection (ETC) system, the identification, the smart card, the application of administing products, and so on. In the thesis, we would like to design the RFID at 5.8 GHz, and apply the circuit design to medical scientific research. The major work of this thesis is to design the front-end of a 5.8GHz RFID receiver. We use the soft tool, ADS, to simulate and design these circuits with the TSMC-SiGe-0.35 process. We will introduce LNA, MIXER and VCO of the receiver circuit in order. The parts of LNA and MIXER in the receiver have been implemented on a chip, and the VCO is only simulated by ADS.
摘 要
Abstract
致 謝
目 次
表 目 錄
圖 目 錄
序 論
第一章 RFID簡介
1.1 相關研究發展概況
1.2 RFID基本架構
1.2.1 天線或線圈
1.2.2 無線識別卡
1.2.3 讀取機
1.3 醫療研發之RFID
1.3.1 物品追蹤
1.3.2 持續診療
1.3.3 病人身分與地點確認
第二章 LNA介紹與設計
2.1 各類參數概述
2.1.1 穩定度(Stability)
2.1.2 靈敏度(Sensitivity)
2.1.3 雜訊指數(Noise Figure)
2.1.4 1dB壓縮點(P1dB :1dB Compression)
2.1.5 S參數(S parameter)
2.1.6 輸入三階截斷點(Input Third-order Intercept Point, IIP3)
2.2 模擬與下線實作
2.2.1 架構簡介
2.2.2 設計流程
2.2.3 電路模擬
2.2.4 下線實作
2.3 預計規格列表
第三章 MIXER介紹與設計
3.1 規格參數介紹
3.1.1 轉換增益(Conversion Gain)
3.1.2 雜訊指數(Noise Figure)
3.1.3 隔離度(Isolation)
3.1.4 非線性效應
3.1.5 交互調變 (Intermodulation)
3.1.6 輸入三階截斷點(Input Third-order Intercept Point, IIP3)
3.1.7 1dB壓縮點(1dB Compression, P1dB )
3.2 單端平衡式混頻器
3.3 模擬與下線實作
3.3.1 架構簡介
3.3.2 電路模擬
3.3.3 下線實作
3.4 預計規格列表
第四章 VCO介紹與設計
4.1 VCO之工作原理
4.1.1 變容二極體
4.1.2 相位雜訊
4.1.3 輸出緩衝級(Output buffer)
4.2 電路架構與模擬
4.2.1 架構簡介
4.2.2 電路模擬
第五章 結論
參考文獻
附錄A LNA晶片製作
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[2]周湘琪/譯,RFID技術與應用,旗標出版社,民國九十三年
[3]鄭同伯,無線射頻辨識完全剖析,博碩出版社,2004.11初版
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[9]P. Crippa, S. Orcioni, F. Ricciardi, C. Turchetti, “Design of a 4.4 to 5 GHz LNA in 0.25-/spl mu/m SiGe BiCMOS technology,” Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on Volume 1, Page(s):I-333 - I-336, 25-28 May 2003
[10]J. Sadowy, J. Graffeuil, E. Tournier, L. Escotte, R. Plana, “Advanced design of high linearity, low noise amplifier for WLAN using a SiGeBiCMOS technology,” Silicon Monolithic Integrated Circuits in RF Systems, Page(s):6 – 11, Sept. 2001.
[11]J. Lee, G. Lee, G. Niu, J.D. Cressler, J.H. Kim, J.C. Lee, B. Lee, N.Y. Kim, ”The design of SiGe HBT LNA for IMT-2000 mobile application,”Microwave Symposium Digest, 2002 IEEE MTT-S International Volume 2, 2-7 Page(s): 1261 – 1264 June 2002.
[12]S.N. Youn, S.P. Chul, “PCS/W-CDMA dual-band MMIC power amplifier with a newly proposed linearizing bias circuit,” Solid-State Circuits, IEEE Journal of Volume 37, Issue 9, Page(s): 1096 – 1099, Sep 2002
[13]http://www.rfic.co.uk/
[14]E. Chan, “Design of a 5-6 GHz single balanced Schottky diode mixer,” Applied Electromagnetics, 2003. APACE 2003. Asia-Pacific Conference on 12-14 Aug. 2003 Page(s): 67 - 71
[15]S. Kang, B. Kim, “Second order nonlinearity analysis of Gilbert mixer,” Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE 8-10 Page(s): 559 – 562 June 2003.
[16]Li Li, H. Tenhunen, “A high-linearity SiGe mixer ICs for 5-6 GHz wireless applications,” Circuits and Systems, 2004. MWSCAS’04. The 2004 47th Midwest Symposium on Volume 1 Page(s):I - 193-6, 25-28 July 2004.
[17]L. Sheng, L.E. Larson, “A Si/SiGe BiCMOS mixer with 3rd-order nonlinearity cancellation for WCDMA applications (student paper),” Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE Page(s):417 – 420 8-10 June 2003.
[18]T. H. Lee, “The design of CMOS radio-frequency integrated circuits,” chapter 17 1998.
[19]G. Grau, U. Langmann, W. Winkler, D. Knoll, J. Osten, and K. Pressel, “A current-folded up –conversion mixer and VCO with center-tapped inductor in a SiGe-HBT technology for 5GHz wireless LAN applications.” IEEE J. Solid-State Circuits, vol. 35, pp. 1345-1352, Sept. 2000.
[20]Y. Eo, K. Kim, B. Oh, “Low noise 5 GHz differential VCO using InGaP/GaAs HBT technology.” IEEE Microwave And Wireless Components Letters, vol. 13, pp. 259-261, July. 2003.
[21]A.Y. Shih, C.M. Chin, and S.S. Lu, “A 5.7 GHz interpolative VCO using InGaP/GaAs HBT technology.” IEEE Microwave Wireless Components Letters, vol. 12, pp. 37–38, Feb. 2002.
[22]J.O. Plouchart, H. Ainspan, M. Soyuer, and A. Ruehli, “A fully-monolithic SiGe differential voltage-controlled oscillator for 5 GHz wireless applications.” Proc. 2000 IEEE Radio Frequency IC Symposium, pp. 57–60.
[23]I.S. David and S. Raman, “5-6 GHz SiGe VCO with tunable polyphase output for analog image rejection and I/Q mismatch compensation.” Proc. 2003 IEEE Radio Frequency IC Symposium, pp. 683–686.
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