臺灣博碩士論文加值系統

本篇論文主要是提出一個適用於CCITT標準的非同步二維離散餘弦轉換處理器與反二維離散餘弦轉換處理器設計，在非同步設計上是用Sutherland Micropipeline 來構成交握式管線設計，而在二維離散餘弦轉換處理的實現上，是用行列分解的方式，把整個架構分成兩個一維離散餘弦轉換處理器與一個行列轉置記憶體，並用Distributed Arithmetic(DA)的方法實現陣列的相乘積，取代乘法器的使用，減少面積與成本。

This thesis proposes an asynchronous discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) processor core compliant with the CCITT recommendation H.261. We use the Sutherland Micropipeline structure to implement an asynchronous pipeline. It makes the data transmit forward by handshake protocol. And we adopt row-column decomposition to separate two-dimensional DCT /IDCT into two one-dimensional DCT/IDCT and a transpose memory. In order to reduce area and cost, we introduce the distributed arithmetic (DA) to take the place of multiplier.

CHINESE ABSTRACT I
ENGLISH ABSTRACT II
ACKNOWLEDGEMENTS III
TABLE OF CONTENTS IV
LIST OF FIGURES VII
LIST OF TABLES X
CHAPTER
I. INTRODUCTION 1
1.1 Motivation 1
1.2 Advantages and Drawbacks of Asynchronous Circuits 2
1.3 Outline of this Thesis 3
II. ASYNCHRONOUS STRUCTURE OF MICROPIPELINE 4
2.1 Concept of asynchronous circuit 4
2.1.1 Different between Synchronous and Asynchronous design 4
2.1.2 Two Categories of Completion Detection 5
2.1.3 Handshake Protocols of Asynchronous system 6
2.2 Micropipeline 8
2.3 Logic Modules for Events 11
III. ALGORITHMS OF DCT AND IDCT 13
3.1 1-D DCT and IDCT 13
3.1.1 Equations of 1-D DCT and IDCT 13
3.1.2 1-D DCT and IDCT Fast Algorithm 15
3.2 2-D DCT and IDCT 17
3.3 DCT Architecture Comparison 18
IV. DISTRIBUTED ARITHMETIC 21
4.1 Overview of Distributed Arithmetic 21
4.2 Algorithm of Distributed Arithmetic 22
4.3 Architecture of Distributed Arithmetic 22
V. SYSTEM ARCHITECTURE AND IMPLEMENTATION RESULT 28
5.1 Block Diagram of Asynchronous DCT Processor 28
5.2 Blocks of DCT Processor 30
5.2.1 Blocks of Pre-processing 33
5.2.2 Blocks of Distributed Arithmetic 38
5.3 Architecture of Transpose RAM 43
5.4 Asynchronous 2-D IDCT Processor 47
5.5 Implementation Result 49
5.5.1 Design Flow 49
5.5.2 Simulation Result 51
VI. CONCLUSION AND FUTURE WORK 61
REFERENCES 63

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