臺灣博碩士論文加值系統

多重協定標籤交換（Multi-Protocol Label Switching，MPLS）是一種用於分封交換網路（Packet Switching）的新興封包轉送技術。MPLS利用像是非同步傳輸模式（ATM）中虛擬線路（Virtual Circuit）的概念，提供快速的封包轉送服務。MPLS結合了連線導向與分封交換的優點，因此非常適合用以建置具服務品質保證（QoS Guarantee），以及支援訊務工程（Traffic Engineering, TE）的骨幹網路。 MPLS-TE相較於傳統IP網路，能達成更好的網路資源管理與利用，並能輕易達成錯誤恢復之快速重新繞路（Fast Re-Route, FRR）。在差別式服務（Differentiated Services, DiffServ）的架構中，應用了若干不同的技術，以訊流類別為基礎，嘗試於網際網路中提供具高延展性及低複雜度的服務品質保證。網路處理器是一種嶄新的嵌入式平台，擁有跟General Processor一樣的完整的可程式化能力，開發者可以透過軟體設計開發出支援各類型的網路通訊設備；卻又能提供不亞於ASIC的效能。本論文以Intel IXP（Internet eXchange Processor）2400高階網路處理器為平台，以Intel IXA（Internet eXchange Architecture）的軟體開發框架為基礎，實作完整的支援DiffServ和TE-FRR的MPLS邊界/核心路由器之資料平面；最後透過不同的實驗來驗證系統的弁遄A測試與評估系統的效能。

MPLS (Multi-Protocol Label Switching) is an emerging switching technology on packet-switched networks. It adopts the concept of Virtual Circuit which was introduced by ATM (Asynchronous Transfer Mode) to provide fast packet switching services. Since MPLS combines the advantages of both connection-oriented and packet-switching, it is recommended to deploy QoS (Quality of Services) guaranteed and TE (Traffic Engineering) featured network infrastructure over MPLS. Networks with MPLS-TE support have better resource utilization and higher overall throughput. Moreover, higher service survivability can be achieved by using fast failure recovery technologies such as FRR (Fast Re-Route). DiffServ (Differentiated Services) is an architecture which uses several technologies based on the per-class basis trying to provide scalable QoS guarantee with low complexity on the Internet. Network Processor is a fully programmable embedded system. It delivers the power of programmability and the high performance approaching to the ASICs. In this thesis, we implement the DiffServ enabled and TE-FRR supported MPLS edge/core router data plane based on the IXA software development framework on the IXP2400 Network Processor based platform. We also provide the functionality verifications and performance evaluation through several experiments.

目錄
第一章 簡介
第二章 高階網路處理器（Intel IXP 2400）
2.1　網路處理器簡介
2.2　IXA高階網路處理器架構
2.3　IXP 2400硬體架構
2.4　IXP 2400軟體架構
第三章 差別式服務、多重協定標籤交換技術與訊務工程
3.1　差別式服務（DiffServ）架構
3.2　多重標籤交換技術（MPLS）
3.3　訊務工程（Traffic Engineering）
3.4　支援差別式服務與訊務工程之多重協定標籤交換網路
第四章 支援DiffServ與TE之MPLS路由器系統架構
4.1　完整系統架構概觀
4.2　控制平面（Control Plane）概述
4.3　資料平面（Data Plane）系統架構與處理流程
第五章 資料平面主要弁鄐艇韝峎袺鷅t算法說明
5.1　MPLS FTN及其對Marking之延伸
5.2　MPLS ILM及其對DiffServ支援的延伸
5.3　MPLS對TE-FRR支援之延伸
5.4　Six-Tuple Classifier for IPv4
5.5　Three-Color Meter
5.6　Scheduler for DiffServ
5.7　WRED
第六章 弁鉣褌珨P效能測試
6.1　弁鉣褌?
6.2　效能測試
第七章 結論
Reference

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