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研究生:謝君毅
研究生(外文):Chun-I Hsieh
論文名稱:應用在溝渠式動態存取記憶體之金屬-介電質-金屬電容的熱穩定性探討
論文名稱(外文):Investigation of Thermal Stability of Metal-Insulator-Metal Capacitors for Trench DRAM
指導教授:潘同明
指導教授(外文):Tung-Ming Pan
學位類別:碩士
校院名稱:長庚大學
系所名稱:半導體產業研發碩士專班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:英文
論文頁數:120
中文關鍵詞:動態存取記憶體金屬-介電質-金屬電容熱穩定性高介電材料
外文關鍵詞:DRAMMIM CapacitorThermal stabilityHigh-k materials
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  • 被引用被引用:0
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在本論文中,我們探討了DRAM中最關心的MIM電容之熱穩定,介電質沉積後之氮氣或氧氣退火製程都在本論文中有所研究,並發現了氮氣退火製程能使薄膜更加製密,等效厚度會隨著氮氣退火的溫度增加而減少,但是,若是利用氧氣做為退火的製程氣體,只會在800oC有同樣的效果。金屬沉積後之退火製程則與介電質沉積後之退火製程有著相反的結果,等效厚度會隨著溫度增加而增加。同時,我們也研究了電容的漏電機制,在低電場時, Schottky emission是主要的漏電機制,到了高電場則是 Poole-Frenkel conduction主宰漏電流的大小,熱穩定的探討也同時利用了SILC來得到驗證。接著,熱退火所引發的物理變化也被發掘,下電極的氧化是電性衰退的主要原因,包括了下電極變得粗糙、生成較厚的介面層、較低的電容、較高的漏電流與較差的可靠度。為了抑制這不論是在沉積過程或是退火所產生氧化現象,我們將一層超薄的氮化鎢鑲嵌在下電極與氧化鋁介電層中間作為氧的阻擋層,我們發現有加入氮化鎢薄膜的電容有著較少的氧化現象,也因此有較高的電容值、較低的漏電流與較佳的可靠度, 經由AFM、XRD與XPS等物性分析也得到氮化鎢薄膜功效的驗證,所以TiN/Al2O3/WN/TiN這個電容結構可以說是最有機會應用在未來低於50nm世代的DRAM技術。
In the thesis, thermal stability, the most concern in DRAM technology, of metal-insulator-metal capacitors was investigated. Post deposition annealing (PDA) in either N2 or O2 ambiance was performed. It was found that N2 PDA could condense bulk film and EOT decreased with the increasing PDA temperature. But the effect of O2 PDA only worked at 800oC. Post metal annealing (PMA) showed the opposite behavior to PDA which EOT was proportional to the PMA temperature. Meanwhile, the conduction mechanism of leakage current was also disclosed. Schottky emission dominated the leakage current under low electrical field and Poole-Frenkel conduction was responsible for leakage under high electrical field. The thermal stability was also verified by stress induced leakage current (SILC). Then, physical behavior induced by thermal annealing was revealed that oxidation of bottom electrodes was the major reason for electrical degradation which exhibited large surface roughness, thick interfacial layer, low capacitance, high leakage current, and undesired reliability. In order to suppress the oxidation induced by either ALD deposition or thermal process, an ultra-thin WN layer was embedded into the interface between bottom TiN electrode and Al2O3 layer as an oxygen barrier layer. MIM capacitors with WN layer showed less oxidation in bottom electrode, thus higher capacitance, lower leakage current and better reliability. Physical analyses including AFM, XRD and XPS were applied and confirmed the effect of WN layer. Therefore, it was believed that TiN/Al2O3/WN/TiN capacitor was most promising structure for DRAM application beyond 50nm technology.
Acknowledgment (Chinese)
Abstract (Chinese)
Abstract (English)
Table of Contents
Table Captions
Figure Captions
Chapter 1 Introduction
1-1 Motivation
1-2 High-k Dielectrics
1-3 MIM Capacitors
1-3.1 Characteristics of Al2O3
1-3.2 Characteristics of TiN
1-4 Atomic Layer Deposition
1-5 Organization of the Thesis
Chapter 2 Characteristics of MIM Capacitors
2-1 Introduction
2-2 Experimental Procedures
2-3 Results and Discussion
2-3.1 Electrical properties of MIM capacitors with N2 annealing
2-3.2 Electrical properties of MIM capacitors with O2 annealing
2-3.3 Characterization of leakage current
2-3.4 Characterization of constant voltage stress
2-4 Summary
Chapter 3 WN Barrier Layers for MIM capacitors
3-1 Introduction
3-2 Experimental Procedures
3-3 Results and Discussion
3-3.1 Structural analysis of oxidation in TiN films
3-3.2 Electrical properties of metal buffer layers
3-3.3 Structural analysis of WN buffer layer
3-3.4 Electrical properties of TiN/Al2O3/WN/TiN capacitors
3-4 Summary
Chapter 4 Conclusions & Recommendations
Reference
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