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研究生:范哲耀
研究生(外文):Che-yao Fan
論文名稱:應用於WiMAX系統之四相位壓控振盪器設計與製作
論文名稱(外文):Design and implementation of the quadrature voltage controlled oscillator for WiMAX system application
指導教授:何滿龍何滿龍引用關係
指導教授(外文):Man-long Her
學位類別:碩士
校院名稱:逢甲大學
系所名稱:通訊工程所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:英文
論文頁數:90
中文關鍵詞:四相位壓控振盪器共振腔
外文關鍵詞:QVCOresonator
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由於近年來的網路蓬勃發展,導致了原有的網路架構已不敷使用,許多廠商為了改善現階段網路缺點提出了很多方法,其中最受擁護的即是WiMAX (worldwide Interoperability for microwave access)。WiMAX是一種新的無線寬頻技術,由於具備有高達75Mbps的傳輸效率,以及涵蓋50公里的傳輸範圍。可以提供高頻寬、點對點之回程連接。故本篇論文即針對此無線網路技術來設計其射頻收發機中的關鍵元件-壓控振盪器。

在此篇論文裡,我們利用了台灣積體電路公司0.18um之製程技術來實現本電路,同時從電路設計過程、電路模擬、到佈局考量及其效應皆有完整描述。在電路設計方面,我們先設計了一個差動式CMOS LC 互補式壓控振盪器,以及將所製作的互補式壓控振盪器,利用交越耦合之電路觀念來組合成適用於WiMAX系統的四相位壓控振盪器。在此電路架構中,我們利用了LC諧振電路來組成共振腔,其振盪所產生之信號可以比環形振盪器等其他電路之純度要來的高,另外在相位雜訊表現方面,也表現的比其他諧振電路理想。另外在驅動級部份,本電路一改傳統偏壓驅動電路方式,取而代之使用電流鏡來驅動電路,雖然會造成消耗功率增加,但對於振盪核心而言,卻可以有效地降低相位雜訊。且就設計上而言也可以快速的調整所需的偏壓電流,達到調整上的方便性。

根據以上所闡述之理論,便可以開始設計及完成本論文題目:應用於WiMAX系統之單石微波金氧半四相位壓控振盪器設計與製作。在第一顆QVCO中,我們利用了互補式的差動LC VCO來完成此電路,其整體消耗功率(包含緩衝放大器端)為35.1 mW,相位雜訊為-118.9 dBc at 1 MHz,在相位準確度方面皆小於0.7°,頻率可調範圍可從3.1 GHz到3.9 GHz,最大輸出功率為-13.5 dBm。

有鑒於第一顆電路之消耗功率及最大輸出功率並不是非常理想,所以在第二顆QVCO電路設計中,我們將互補式架構改成由PMOS作交越耦合電晶體來完成此電路,且在緩衝放大器端使用了反向器來降低整體操作工率,其整體消耗功率(包含緩衝放大器端)為28 mW,相位雜訊為-119.5 dBc at 1 MHz,在相位準確度方面皆小於0.9°,最大輸出功率為-11 dBm,頻率可調範圍可從3.1 GHz到3.9 GHz.

在第三顆IC方面,我們利用NMOS作後閘級耦合配合上MOS電阻與PMOS交越耦合端來構成疊接架構,此架構能把輸出功率再大大的提升,讓輸出功率最高可以達到-7 dBm,在相位雜訊也能符合要求,且使得消耗功率降低。本電路整體消耗功率(包含緩衝放大器端)為20.4 mW,相位雜訊為-118.8 dBc at 1 MHz,在相位準確度方面皆小於1.5°,最大輸出功率為-7 dBm,頻率可調範圍可從3.4 GHz到3.8 GHz.此頻帶滿足WiMAX系統所規劃之頻帶。本論文所設計之電路皆可應用於WLAN與WiMAX之直接降頻式或是低中頻、零中頻等收發機系統。
In recent years, the development of the internet has made the existing network structures insufficient. Many factories are developing methods to improve this problem. The main method is worldwide interoperability for microwave access (WiMAX). WiMAX is a new wireless wideband technology; it has a 75 Mbps data rate to transmit information; its transmission coverage range is 50 kilometers. This technique can offer wide bandwidth, nomadic access for point to point (PTP) and point to multipoint (PMP) applications. Because of above mention, this thesis is aimed at wireless network technology and designed one of the key building blocks in radio frequency communication transceivers.

In this thesis, we use TSMC standard 0.18 µm RF CMOS process to implement the circuits. The circuit designs, circuit simulation, electromagnetic effect on the layout of the circuit are described completely. In the design of the circuit, first we design a differential CMOS complementary LC VCO, and then we use the ideas of the cross couple circuit and complementary LC VCO to produce a quadrature voltage controlled oscillator (QVCO) which is adapted to the WiMAX system. In the structure of QVCO, we use LC resonators to compose tanks, these resonators will produce oscillation signals and achieve higher spectral purity; their phase noise is better than other types such as ring oscillators, etc. In the driver stage, we use the new current mirror structure instead of a traditional voltage bias circuit, although this method will increase the power consumption, for the oscillator core, it will reduce the phase noise effectively. When we design the circuit, we can change the bias current speedily by adjusting the values of transistors.
In the first design, we use the complementary differential LC VCO to complete our circuit. The power consumption of the first QVCO (with buffer stage) is 35.1 mW. The phase noise is lower than -118.9 dBc at 1 MHz, and the phase error is smaller than 0.7°. The frequency tuning range is from 3.1 GHz to 3.9 GHz and the maximum output power is -13.5 dBm.

Because the power consumption and the maximum output power of the first QVCO are not ideal, we can complete our circuit by changing the structure of circuit from complementary LC VCO to PMOS cross-coupling LC VCO; furthermore, in the buffer stage, we make a buffer by using an inverter to reduce the total power consumption. The power consumption of the second QVCO (with buffer stage) is 28 mW. The phase noise is lower than -119.5 dBc at 1 MHz, the phase error is smaller than 0.9° and the maximum output power is -11 dBm. The frequency tuning range is from 3.1 GHz to 3.9 GHz, it satisfies the WiMAX system.

In the third QVCO design, we can complete cascode structure by using back gate coupled (use NMOS) and MOS resistor. This structure will increase the output power; furthermore, the phase noise is already to conform the WiMAX standard. The power consumption of the third VCO (with buffer stage) is 20.4 mW. The phase noise is lower than -118.8 dBc at 1 MHz, the phase error is smaller than 1.5° and the maximum output power is -7 dBm. This circuits (including first, second designs and third designs) can be applied to direct conversion systems, low IF systems and WiMAX systems.
Abstract II
Chinese Abstract IV
Contents VI
List of Tables VIII
List of Figures IX

Chapter 1 Introduction 1
1.1 Research motivation 1
1.2 Literature survey 2
1.3 Thesis organization 3

Chapter 2 The overview of WiMAX technology 4
2.1 The introduction and history of WiMAX technology 4
2.2 WiMAX standards in IEEE 802.16 6
2.3 Introduction of OFDM and OFDMA 7

Chapter 3 The fundamental of CMOS quadrature voltage controlled oscillator 10
3.1 Introduction 10
3.2 Specification of QVCO properties 11
3.3 The LC resonator and adding negative resistor 12

Chapter 4 Design of a fully integrated CMOS 3.5 GHz quadrature voltage controlled oscillator 17
4.1 Introduction 17
4.2 Circuit design and analysis 19
4.3 Circuit improvement and analysis 24
4.4 Circuit simulation 27
4.5 Measurement of the CMOS 3.5 GHz quadrature voltage controlled oscillator 41

Chapter 5 Improvement of a fully integrated CMOS 3.5 GHz quadrature voltage controlled oscillator 43
5.1 Introduction 43
5.2 Circuit improvement and analysis 44
5.3 Circuit simulation 46
5.4 Post simulation 55
5.5 Expected results 59
5.6 Measurement of the CMOS LC QVCO 60
5.7 Summary 64

Chapter 6 Design of a fully integrated CMOS 3.5 GHz QVCO with cascode structure 66
6.1 Introduction 66
6.2 Circuit improvement and analysis 67
6.3 Circuit simulation 69
6.4 Post simulation 76
6.5 Expected results 79
6.6 Measurement of the CMOS LC QVCO 80
6.7 Summary 83

Chapter 7 Conclusions 85
References 88
[1]Shih-Hao Tarng; Christina F, Jou, “A 10 GHz low power CMOS quadrature voltage-controlled oscillator,” Digital Object Identifier/APMC Volume 2, 4-7 Dec. 2005 Page(s):4 pp.
[2]Fard, A.; Andreani,P., “A low-phase-noise wide-band CMOS quadrature VCO for multi-standard RF front-ends,” Digital Object Identifier 10.1109/RFIC.2005. 12-14 June 2005 Page(s):539 - 542
[3]Min Chu; Sudip Shekhar; David J. Allstot; Tarun K, Bhattacharyya, “Design Consideration for Anti-phase Injected Quadrature Voltage Controlled Oscillator” Digital Object Identifier/ ICECS 13-15 Dec. 2004 Page(s):25 – 28
[4]David J. Allstot; Kiyong Choi; Jinho Park, “Parasitic-Aware Optimization of CMOS RF Circuit” Kluwer Academic Publisher, Feb. 2003.
[5]Byeong-Ha Park; Allen, P.E., “Low-power, low-phase-noise CMOS voltage-controlled-oscillator with integrated LC resonator,” Circuits and Systems, 1998. ISCAS ''98. Proceedings of the 1998 IEEE International Symposium on Volume 4, 31 May-3 June 1998 Page(s):421 - 424 vol.4.
[6]Chao-Shiun Wang; Wei-Chang Li; Chorng-Kuang Wang, “A multi-band multi-standard RF front-end IEEE 802.16a for IEEE802.16a and IEEE802.11 a/b/g application,” ISCAS, 23-26 May 2005 Page(s):3974 - 3977 Vol. 4
[7]Hye-Ryoung Kim, Choong-Yul Cha, Seung-Min Oh, Moon-Su Yang, Sang- Gug Lee, “A Very Low-Power Quadrature VCO With Back-Gate Coupling,” IEEE Journal of Solid-State Circuits, Vol. 39, NO. 6, June 2004
[8]Chao-Shiun Wang; Shiau-Wen Kao; Po-Chiun Huang, “A low phase noise wide tuning range CMOS quadrature VCO using cascade topology,” Digital Object Identifier/APASIC 4-5 Aug. 2004 Page(s):138 – 141
[9]Nam-Jin Oh; Sang-Gun Lee, “Current reused LC VCOs,” Digital Object Identifier/LMWC Volume 15, Issue 11, Nov. 2005 Page(s):736 – 738
[10]Andreani, P.; Bonfanti, A.; Romano, L.; Samori, C., “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” Digital Object Identifier/JSSC Volume 37, Issue 12, Dec. 2002 Page(s):1737 – 1747
[11]Ahmadreza Rofougaran; Jacob Real; Maryam Rofougaran; Asad Abidi, “A 900 MHz CMOS LC-Oscillator with Quadrature outputs,” Electrical Engineering Department, University of California, Los Angeles, CA
[12]Seong-Mo, Moon; Moon-Que, Lee; Byung-Sung, Kim, “Design of quadrature CMOS VCO using source degeneration resistor,” Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE. 12-14 June 2005 Page(s):535-538
[13]Andreani, P., “A Low-Phase-Noise Low-Phase-Error 1.8 GHz Quadrature CMOS VCO ,” Digital Object Identifier/ISSCC Volume 1, 3-7 Feb. 2002 Page(s):290 – 466
[14]Man Long Her; KUO-LIN CHUANG; Ming-Yi Shen; Che-Yao Fan; Shao-Ran Chang, “Ultra Wideband (UWB) Quadrature Voltage-Controlled-Oscillator for Multi-Band Application,” CSTRWC 2006 , Macao University, Macao, China
[15]Rao R. Tummala, Fundamentals of Microsystems Packaging, McGraw-Hill, 2001.
[16]Behzad Razavi, RF Microelectronics, Prentice Hall PTR., 1998.
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