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研究生:陳慶達
研究生(外文):Ching-Ta Chen
論文名稱:嵌入式微處裡器之高效率即時位址追蹤系統
論文名稱(外文):A New and Efficient Real-Time Address Tracer for Embedded Microprocessors
指導教授:蔣元隆蔣元隆引用關係
指導教授(外文):王鴻猷
學位類別:碩士
校院名稱:國立高雄應用科技大學
系所名稱:電子與資訊工程研究所碩士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:英文
論文頁數:107
中文關鍵詞:嵌入式微處裡器即時位址追蹤
外文關鍵詞:Embedded MicroprocessorsReal-Time Address Tracer
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  • 下載下載:15
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位址追蹤能提供程式設計者有個良好的即時性監測能力,它能將微處理器在指令提取時所產生的位址資料做忠實的記錄。因此位址資料可以被用來作為系統架構的除錯和系統程式的觀測。然而,在追蹤記憶體有限的情況下,位址資料在寫入至追蹤記憶體前一定要經過壓縮的處理,而有效的壓縮就能紀錄較多的位址資料並達到較佳的監測效果。因此即時位址追蹤壓縮器就是位址追蹤系統的核心。在本篇論文裡,藉由分析微處理器的結構與程式的特性,我們提出一個能有效壓縮位址資料的方法,並且在這個新的版本裡增加了前置及後置處裡步驟、因此那些被追蹤的記憶體就能經由移動在線工作的負荷到前置及後置處裡步驟而大大的減少記憶體的被需求量。最後,我們得到一個高達99.99%的壓縮率,此結果讓微處理器除錯系統的即時追蹤能力獲得了大幅度的提升。
Address tracer provides designers a well real-time monitor capability. It can faithfully record the address data which are generated from instruction fetch stage of the microprocessor. Therefore, the address data not only can help designer to debug the architecture of system but also be able to observe the behavior of program. Owing to the limited trace memory; the address date ought to be compressed before storing into trace memory. It can record more address data and get better monitor capability while the compression effect is better. Hence, the real-time address tracing compressor is the major kernel of address trace system. According to the architecture of microprocessor and feature of program, we provide an efficient compression method and in this new version adds a pre- and post-procession steps such that the needed tracing memories can be further greatly decreased by shifting the on-line work loading to the pre-processing and post-processing. The compression ratio reaches 99.99%. The result clearly shows that the address tracing compressor improves the performance of dynamic debugging.
CONTENTS

CHAPTER 1 INTRODUCTION 1
1.1 BACKGROUND 1
1.2 MOTIVATION 3
1.3 THE PROPOSED APPROACH 4
1.3.1 Embedded Debugging 4
1.3.2 The Debugging Processor Cores 5
1.3.3 The Hardware of ARM Debug System 6
1.3.4 Embedded-ICE 7
1.3.5 Embedded Tracing 11
1.3.5.1 Trace Compression 11
1.3.5.2 Real-Time Debugging 12
1.4 PAPER ORGANIZATION 14
CHAPTER 2 RELATED WORK 15
2.1 DATA COMPRESSION 15
2.2 TAXONOMY OF ADDRESS TRACE TECHNIQUE 17
2.3 THE ADDRESS TRACE TECHNIQUE 19
CHAPTER 3 ON-CHIP DEBUGGING SYSTEM 26
3.1 IEEE STD. 1149.1 (JTAG) [3] [4] 26
3.2 EMBEDDED IN-CIRCUIT EMULATOR (EICE) [5] [6] [7] [8] [9] 32
3.3 INTRODUCTION OF TRACING [10] 34
3.4 THE INSTRUCTION OF BRANCH AND BRANCH WITH LINK (B, BL) 36
3.5 THE PIPELINE ARM ORGANIZATION 39
CHAPTER 4 PRINCIPLE AND ARCHITECTURE 45
4.1 ALGORITHM OF COMPRESSION 47
4.2 ALGORITHM OF DECOMPRESSION 49
4.3 MAIN COMPRESSION STEPS 51
4.3.1 The First Step: 51
4.3.1.1 The Non-Sequential PC Filter 51
4.3.1.2 Pre-Processing 54
4.3.1.3 Combination Compare Decision 56
4.3.2 The Second Step: 57
4.3.2.1 Replace Repeated Compression 57
4.3.2.2 Similarity PC Reduction 59
4.4 ARCHITECTURE OF COMPRESSOR 62
4.4.1 The Architecture for the First Step 62
4.4.2 The Architecture for the Second Step 64
4.4.3 The Architecture for the Third Step 65
CHAPTER 5 EXPERIMENTS AND RESULTS 67
5.1 FPGA IMPLEMENTATION 68
5.1.1 First Block Signal Information of Trace Compressor 71
5.1.2 Second Block Signal Information of Trace Compressor 76
5.1.3 Third Block Signal Information of Trace Compressor 85
5.1.4 Trace Compressor Signal Information 93
5.2 SYNTHESIZE AND SIMULATION 95
5.2.1 Cell-Based Physical Layout 98
5.3 THE RESULT OF COMPRESSION RATIO 100
CONCLUSION 103
PUBLICATION LIST 106
CERTIFICATE OF TRAINING 107
References
[1]Shyh-Ming Huang; Ing-Jer Huang; Chung-Fu Kao, 2003., “Reconfigurable real-time address trace compressor for embedded microprocessors”, Field-Programmable Technology (FPT) Proceedings. 2003 IEEE International Conference on 15-17 Dec. 2003 Page(s): 196- 203
[2]Shyh-Ming Huang, 2003, A Real-Time Address Trace Compressor for Embedded Microprocessors, National Sun Yat-sen University,
[3]The Institute of Electrical and Electronics Engineers, Inc. 3 Park Avenue, New York, NY 10016-5997, USA. “IEEE Std 1149.1-2001”
[4]Altera corporation. “IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices”. January 2005,ver.5.1
[5]Ing-Jer Huang; Chung-Fu Kao, 2000., “Exploration of Multiple ICE’s for Embedded Microprocessor Cores in an SOC Chip”, Proceedings of 11th VLSI/CAD Symposium, Page(s):247-250, Taiwan, August 2000
[6]Ing-Jer Huang; Hsin-Ming Chen; Chung-Fu Kao, 2001, “Reusable Embedded In-Circuit Emulator”, Proceedings of the Asia and south Pscific Design Automation Conference, Japan, January 31~Febuary 2, 2001
[7]Ing-Jer Huang; Tai-An Lu, 1998, “ICEBEGE: An Embedded In-circuit Emulator Synthesizer for Microcontrollers”, Proc. of the 36’th design Automation Conference, June 1998
[8]Tai-An Lu ; Ing-Jer Huang, 1998,”Synthesis of Embedded In-Circuit Emulators for Industrial Microcontrollers”, Proc. of IEEE International Symposium on consumer electronics, 1998
[9] Ing-Jer Huang; Chung-Fu Kao; Hsin-Ming Chen; Ching-Nan Juan; and Tai-An Lu, 2002, “A RetargeTable Embedded In-Circuit Emulation Module for Microprocessors”, IEEE Design and Test, (special issue on Embedded Processor Based Designs), page 28-38, July/August 2002. (SCI).
[10]Hsin-Ming Chen, 2001, Analysis of Hardware and Software Approaches to Embedded In-Circuit Emulation of Microprocessor, National Sun Yat-sen University,
[11]Steve Furber, “ARM System-on-Chip”, 1996
[12]Ciaran MacNamee and Donal Heffernan, 2000, “Emerging on-chip debugging techniques for real-time embedded systems”, Computing & Control Engineering Journal, December 2000
[13]Craig B. Stunkel, Bob Janssents and W. Kent Fuchs, 1991,”Collecting Address Traces from Parallel Computers”, Proceedings of the 24 Annual Hawaii internation Conference on System
[14]IEEE-ISTO Nexus 5001 Forum Web Site, http://www.nexus5001.org/

[15]ARM Corp. Web Site, http://www.arm.com

[16]http://www.vectorsite.net/ttdcmp1.html#m2
[17]http://www.cs.iastate.edu/~prabhu/Tutorial/CACHE/pr_locality.html
[18]Yuan-Long Jeang, and Che-Chia Liu, “A High Performance and Low Cost Real-Time Address Tracer for Embedded Microprocessors”, IEEE MWSCAS2005, Aug. 2005.
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