臺灣博碩士論文加值系統

驅動電路轉換控制與資料訊號並將訊號傳給畫素陣列，因此在高解析度與高色彩深度的薄膜電晶體液晶顯示器的應用上有越來越重要的趨勢。在這篇論文裡，我們將提出可應用在資料驅動電路上的輸出緩衝器以及ㄧ個可應用在資料與掃描驅動電路上的電壓位準轉換器。

在第一部份，我們提出ㄧ個可應用於薄膜電晶體液晶顯示器源極驅動電路上之低偏移電壓軌到軌緩衝放大器。此輸出緩衝器由0.35-μm CMOS 2P4M 之製程技術下線製作。一般大尺寸、高解析度與高彩深度的顯示器面板上都會有很大的負載。因此，資料驅動晶片需要個ㄧ個擁有高驅動能力與低偏差電壓的輸出緩衝器。為了能夠達到軌到軌的輸出振幅以及高輸入範圍，本新式輸出緩衝器在輸入級採用互補型摺疊式串疊放大器，第二級是由一個差動放大器組成，可加強電路之增益以及共模互斥比，使電路系統更穩定。而輸出級是採用Class-AB型。此電路的上升及下降穩定時間是1.84 us跟1.34 us，而在中間灰階部份的偏差電壓可降低到0.6 mV。

在第二部份，我們提出了兩個由低溫多晶矽製程製做之可應用於資料線驅動電路的輸出緩衝器以及一個電壓位準轉換器。提出的第一個輸出緩衝器在暫態分析、偏差電壓以及功率消耗方面有不錯的特性。它的上升及下降穩定時間是3.20/4.56 μs，靜態電流是3 μA。第二個輸出緩衝器利用較為簡單的放大器架構來實現好的特性。而透過二極體連接負載的使用，我們提出的電壓位準轉換器達到低功率消耗的效果並且可順利的應用在驅動電路上。

因此，本論文之低偏差電壓軌到軌輸出緩衝器可應用於高解析度高色彩深度之薄膜電晶體液晶顯示器。而提出之可應用於低溫多晶矽的第一與第二輸出緩衝器以及電壓位準轉換器有機會應用於低溫多晶矽薄膜電晶體液晶顯示器面板。

Driving circuits transform control and data signals to a pixel array and have an increasingly importance in high resolution and high color depth TFT-LCDs. In this thesis, output buffers for data drivers and a level shifter in data/scan drivers had been proposed.
In the first section, a low offset voltage rail-to-rail buffer amplifier for TFT-LCD source drivers was proposed. The proposed buffer amplifier was fabricated by a 0.35-μm CMOS 2P4M technology. For large size, high resolution, and high color depth displays, there will have heavy loads on panels. Therefore, data driver ICs need large driving capability and low offset voltage output buffers. The proposed buffer amplifier adopted the complementary folded cascode differential amplifier, which acted as the input stage to reach rail-to-rail output voltage swing and to get high ICMR, the second stage, which was constructed from a differential pair with an active load to enhance the gain and CMRR and to stabilize the circuit, and the class-AB output stage. The rising and falling settling times are 1.84 us and 1.34 us, respectively. The offset voltages are successfully diminished within 0.6 mV for middle gray-levels with a 3.3 V supply voltage.
In the second section, the proposed output buffer I and II and the proposed low power level shifter had been developed by using a 5-μm low temperature poly silicon (LTPS) process technology. The proposed buffer amplifier I had good performance in step response, offset voltages and power consumption. The rising/falling settling time is 3.20/4.56 μs and the quiescent current is 3 μA. The proposed buffer amplifier II uses a simple OP-AMP structure to achieve good performance. By using diode-connected loads, the proposed level shifter has low power dissipation and can be applied for data and scan drivers.
Therefore, the low offset voltage rail-to-rail buffer amplifiers can be applied for high resolution and high color depth TFT-LCDs and the proposed buffer amplifier I, II and level shifter have potential to be used for LTPS-TFT-LCD panels.

CHINESE ABSTRACT……………………………………………………ii
ENGLISH ABSTRACT……………………………………………………iii
CONTENTS………………………………………………………………iv
FIGURE CAPTIONS………………………………………………………vi
TABLE CAPTIONS………………………………………………………xii
Chapter 1　Introduction 1
1.1　Background information………………………………………1
1.1.1　The development of LCD……………………………………1
1.1.2　Benefits of LTPS Technology………………………………2
1.2　Motivation………………………………………………………4
1.3　Purpose…………………………………………………………4
1.4 Organization……………………………………………………5
Chapter 2　Principle of LCD Driving Circuits.............6
2.1　TFT-LCD system…………………………………............6
2.1.1 Construction of TFT-LCD driving circuits..........6
2.1.2 LTPS driver………………...........................7
2.1.3 Scan driver………………...........................8
2.1.4 Data driver………………...........................11
2.2　 Design of Buffer Amplifier for LCD Panel...........14
2.2.1 Design consideration of OPA buffer for LCDs.......14
2.3　Prior buffer amplifiers……...........................................16
2.3.1　Prior buffer amplifiers...........................16
2.3.2　Low offset voltage buffer amplifier...............19
2.3.3 Rail-to-rail output buffer amplifier..............20
2.3.4 High-speed low-power class-AB buffer amplifier....21
Chapter 3　 Implementation of Buffer Amplifier for TFT-LCD Source Driver…………………………………………………………23
3.1　Introduction……………………………………………………23
3.2　Proposed low Offset Voltage rail-to-rail Buffer Amplifier I……………………………………………………………23
3.2.1　Circuit Design………………………………………………23
3.2.2　Simulation Results…………………………………………35
3.2.3　Layout Consideration………………………………………43
3.2.4　Measurement Results………………………………………45
Chapter 4　 Novel Buffer Amplifiers and Level Shifter by LTPS Technology………………………………………………………53
4.1　Introduction…………………………………………………………53
4.2　Proposed circuits for TFT-LCDs data drivers……………53
4.2.1　Circuit description-the proposed buffer amplifier I…………………………………………………………………………53
4.2.2　Circuit description-the proposed buffer amplifier II………………………………………………………………………54
4.2.3　Circuit description-the proposed level shifter……56
4.3　Simulation results……………………………………………58
4.3.1　Simulation results- the proposed buffer amplifier I…………………………………………………………………………58
4.3.2　Simulation results- the proposed buffer amplifier II………………………………………………………………………65
4.3.3　Simulation results- the proposed level shifter……70
4.4　Layout Consideration…………………………………………77
4.5　Measurement Results…………………………………………80
4.5.1　Measurement results the proposed buffer amplifier I…………………………………………………………………………80
4.5.2　Measurement results- the proposed buffer amplifier II………………………………………………………………………86
4.5.3　Measurement results- the proposed level shifter…88
Chapter 5 Conclusion……………………………………………………………94
5.1 Conclusions……………………………………………………94
5.2 Future works……………………………………………………95
References……………………………………………………………96

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