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研究生:詹豪傑
研究生(外文):Hao-Jie Zhan
論文名稱:24GHz互補式金氧半導體電流操作模式射頻前端接收器之設計
論文名稱(外文):The design of 24-GHz CMOS current-mode receiver front-end
指導教授:吳重雨
指導教授(外文):Chung-Yu Wu
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2006
畢業學年度:95
語文別:英文
論文頁數:90
中文關鍵詞:電流操作模式射頻前端接收器
外文關鍵詞:current modeCMOSreceiver fornt-end24-GHz
相關次數:
  • 被引用被引用:1
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本論文提出一個創新的高頻電路設計概念,電流操作模式。並且設計一個操作頻率在24-GHz電流操作模式射頻前端接收器,透過國家晶片系統設計中心委託台灣積體電路製造股份有限公司以0.13微米互補式金氧半導體製程技術來實現。此射頻前端接收器包含的電路有電流操作模式的低雜訊放大器和電流操作模式的降頻器。整個電流操作模式的射頻接收器已經被完整的設計、製造與量測完成。
量測結果顯示,此射頻前端電路可良好地工作在24-GHz的操作頻率,但由於電路佈局上的疏失,量測結果的效能不如當初所預期。在經由雙束型聚焦離子束的補救之後,射頻前端接收器的功率增易為12.5dB,雜訊指數為13.3dB,1dB增易壓縮點為-15dBm,在1.2V的操作電壓下共消耗了41.5mA。
Chinese Abstract..........................................................i
English Abstract..........................................................ii
Contents........................................................................iv
Table Captions.............................................................vi
Figure Captions..........................................................vii

CHAPTER 1 INTRODUCTION
1.1 Background ………………………………………………………….1
1.2 A Review of CMOS RF Receiver Front-End……………………...2
1.2.1 High-Frequency CMOS LNA circuit……………………......…4
1.2.2 CMOS Down-Conversion……………………….…………….10
1.3 Motivation ....……………………….............……………………..16
1.4 Thesis Organization..................................................................16
CHAPTER 2 CIRCUIT DESIGN AND SIMULATION RESULTS
2.1 Current-Mode Low-Noise Amplifier..........................................18
2.1.1 Operational Principle and Design Consideration...................18
2.1.1.1 Input Matching Network………………………………….19
2.1.1.2 Noise and Linearity……………………………………….21
2.1.2 Circuit Implementation ……………………………………….31
2.2 Current-Mode Down-Conversion Mixer………………………...33
2.2.1 Operational Principle and Design Consideration ...……….34
2.2.1.1 Current Summing Circuit.…...……………………..35
2.2.1.2 I-square circuit......................................................36
2.2.2 Circuit Implementation .......................................................40
2.3 Simulation Results ..................................................................42

CHAPTER 3 EXPERIMENTAL RESULTS
3.1 Layout Description..................................................................58
3.2 Measurement Considerations and Setup................................61
3.3 Experimental Results..............................................................65
3.4 Discussions and Comparisons................................................72

CHAPTER 4 CONCLUSIONS AND FUTURE WORKS
4.1 Conclusions.............................................................................78
4.2 Future Work.............................................................................78
[1] B. Razavi, “CMOS technology characterization for analog and RF design,” IEEE J. Solid-State Circuits, vol. 34, pp. 268-276, Mar. 1999.
[2] B. Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall, 1998.
[3] John Rogers and Calvin Plett, Radio Frequency Integrated Circuit Design, Boston. London, MA: Artech House, April 2003.
[4] D. K. Shaeffer and T. H. Lee, “A 1.5V 1.5-GHz CMOS Low Noise Amplifier,” VLSI Circuits Symp. Dig. Tech. Papers, pp. 32-33, June 1996.
[5] D. K. Shaeffer and T. H. Lee, The Design and Implementation of Low Power CMOS Radio Receivers. Boston, MA: Kluwer, 1999.
[6] B. Razavi, IEEE Fellow, “A 60-GHz CMOS Receiver Front-End,” IEEE Journal of Solid-State Circuits, vol. 41, no. 1, January 2006.
[7] K.-W. Yu, Y.-L. Lu, D.-C. Chang, V. Liang, and M. F. Chang, “K-band low-noise amplifiers using 0.18-um CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 3, pp. 106–108, Mar. 2004.
[8] X. Guan and A. Hajimiri, “A 24 GHz CMOS front-end,” IEEE Journal of Solid-State Circuits, vol.38, Feb. 2004, pp.368-373
[9] S.G Lee and L.K Choi, “Current-reuse bleeding mixer,” Electronics letters, vol.36, no.8, 13th April 2000.
[10] S. Emami, C. H. Doan, A. M. Niknejad, and R. W. Brodersen, “A 60-GHz down-converting CMOS single-gate mixer,” in Proc. IEEE Radio Frequency Integrated Circuits (RFIC) Symp., Jun. 2005, pp.163–166.
[11] F. Ellinger, L. C. Rodoni, G. Sialm, C. Kromer, G. von Buren, M.L.Schmatz, C. Menolfi, T. Toifl, T. Morf, M. Kossel, and H. Jackel,“30–40-GHz drain-pumped passive-mixer MMIC fabricated on VLSISOI CMOS technology,” IEEE Trans. Microw. Theory Tech., vol.52, no.5, pp. 1382-1391, May 2004.
[12] H. T. Friis, “Noise Figure of Radio Receivers,” in proc. IRE, vol. 32, pp.419-422, jul. 1994.
[13] T. H. Lee, the design of CMOS radio-frequency integrated circuits, second edition, Boston , MA: Cambridge, 2004
[14] A. A. Abidi, “High-frequency noise measurement on FET’s with small dimensions,” IEEE Transactions in Electron Devices, vol. ED-33, no.11, pp. 1801-1805, Nov. 1986.
[15] Aldert van der Ziel, “Noise in solid-state devices and lasers,” Proceeding of the IEEE, vol. 58, no. 8, pp. 1178-1206, Aug. 1970.
[16] R. P. Jindal, “Noise associated with distributed resistance of MOSFET gate structures in integrated circuits,” IEEE Transactions on Electron Devices, vol. ED-31, no. 10, pp. 1505-1509, Oct.1984
[17] Behzad Razavi, Run-Hong Yan and Kwing F. Lee, “Impact of distributed gate resistance on the performance of MOS devices,” IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications, vol. 41, no. 11, pp.750-754, Nov.1994.
[18] “Fundamentals of RF and microwave noise figure measurements,” Aglient Technologies, Palo Alto, CA, Application note 57-1.
[19] H. Samavati, H. R. Rategh and T. H. Lee, “A 5-GHz CMOS Wireless LAN receiver Front-End,” IEEE J. Solid-State Circuits, vol. 35, pp. 765-772, May 2000.
[20] Joy Laskar, Babak Matinpour and Sudipto Chakraborty, Modern Receiver Front-End, Upper Saddle River, MA: John Wiley & Sons, Inc. (US), 2004.
[21] Huei Wang, Shih-Chieh Shin, “18-26 GHz Low-Noise amplifier Using 130- and 90-nm Bulk CMOS technologies”, Symposium on Radio Frequency Integrated Circuits (RFIC), 2005
[22] Shih-Chieh Shin, Ming-Da Tsai, Ren-Chieh Liu, Kun-You Lin, and Huei Wang,” A 24GHz 3.9-dB NF Low-Noise Amplifier Using 0.18um CMOS Technology,” IEEE Microwave and Wireless Components Letters,Vol.15, NO. 7, July 2005
[23] Olivier Dupuis, Xiao Sun, Geert Carchon, Philippe Soussan, Mattias Frendahl, Stefaan Decoutere and Walter Raedt, “24 GHz LNA in 90nm RF-CMOS with High-Q Above-IC Inductors”, Proceedings of ESSCIRC, Grenoble, France, 2005
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