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研究生:李隆萱
研究生(外文):Lung-hsuan Lee
論文名稱:ZigBee2.45GHz頻帶之傳接器和適用於DVB-H接收機之2K/4K/8K多模式快速傅立葉轉換器
論文名稱(外文):A ZigBee Transceiver Used in 2.45 GHz Band and a 2K/4K/8K Multimode Fast Fourier Transformation for DVB-H Receivers
指導教授:王朝欽
指導教授(外文):Chua-Chin Wang
學位類別:碩士
校院名稱:國立中山大學
系所名稱:電機工程學系研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:中文
論文頁數:68
中文關鍵詞:手持式數位視訊廣播多模式快速傅立葉轉換器無線個人區域網路
外文關鍵詞:ZigBeeDVB-HMultimode Fast Fourier Transformation
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本論文包含兩個主題,第一個主題是 ZigBee 2.45 GHz 頻帶之傳接器,第二個主題是適用於 DVB-H 接收機之 2K/4K/8K 多模式快速傅立葉轉換器。
第一個主題包含模擬及硬體設計,此晶片為應用於 IEEE Std 802.15.4 無線個人區域網路標準之實體層設計,包含 2.45 GHz頻帶的傳送端與接收端的電路實現,在時脈 8 MHz 的量測功率最大為 731 μW,符合低功率設計的需求。
第二個主題包含模擬及硬體設計,同時我們提出了一個可處理循序資料之單晶片快速傅立葉轉換器的實做方法,搭配管線化架構以及 radix-2、radix-22、radix-23 等運算單元,我們並提出一種共用蝴蝶型運算架構的方法來達成此一目的。
This thesis includes two topics. The first topic is a ZigBee transceiver used in 2.45 GHz
band design. The second topic is a 2K/4K/8K multimode fast Fourier transformation ( FFT ) for
DVB-H demodulators.
The first topic includes simulations and hardware design. The chip is a physical layer
design compliant with IEEE Std 802.15.4 standard, including a transmitter and a receiver for
2.45 GHz band. The measurement of the maximum power on silicon is about 731 μW at 8
MHz. It is proved to be compliant with the low power consumption requirement specified by the
standard.
The second topic includes simulations and hardware design of an FFT for DVB-H
demodulators. This processor is based on a pipeline architecture with radix-2, radix-22 and
radix-23 computation element. We propose one sharing butterfly architecture to be used in the
variable length FFT processor.
致 謝 i
摘 要 ii
Abstract iii
目錄 iv
圖目錄 vii
表目錄 ix
第一章 簡介 1
1.1 前言 1
1.2 ZigBee之相關技術及文獻探討 3
1.3 FFT 之相關技術及文獻探討 5
1.4 論文架構 6
第二章 ZigBee 2.45 GHz 頻帶之傳接器 7
2.1 ZigBee 簡介 7
2.2 ZigBee 實體層規格簡介 8
2.2.1 實體層頻帶與調變係數 8
2.2.2 PPDU 封包格式 9
2.2.3 展頻方法 10
2.2.4 相位調變方法 12
2.3 傳送端系統架構 13
2.3.1 PPDU 映對 14
2.3.2 展頻 14
2.3.3 調變 15
2.3.4 脈衝整形 15
2.4 接收端系統架構 16
2.4.1 封包抵達偵測 17
2.4.2 能量偵測 21
2.4.3 頻率偏移補償 22
2.4.4 非同調解調器 23
2.4.5 封包起始點偵測 25
2.4.6 解展頻 26
2.4.7 封包容量解碼 28
2.5 模擬 28
2.5.1 傳送端模擬 29
2.5.2 接收端模擬 30
2.6 晶片量測 30
2.6.1 傳送端量測 31
2.6.2 接收端量測 33
2.7 晶片規格與結論 34
第三章 適用於 DVB-H 接收機之 2K/4K/8K 多模式快速傅立 葉轉換器 35
3.1 簡介 35
3.2 演算法說明 36
3.2.1 快速離散傅立葉轉換 36
3.2.2 Radix - 2 演算法 37
3.2.3 Radix - 2 / 4 演算法 38
3.2.4 Radix - 2 / 4 / 8 演算法 39
3.3 系統架構 41
3.3.1 旋繞因子 42
3.3.2 Radix - 2 模組 43
3.3.3 Radix - 2 / 4 模組 44
3.3.4 Radix - 2 / 4 / 8 模組 44
3.4 模擬 46
3.5 晶片規格與結論 48
第四章 結論與展望 50
參考文獻 51
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