臺灣博碩士論文加值系統

本論文主要為實現一基頻數位預失真之發射機系統架構，目的為改善功率放大器線性度。本架構採用極座標架構之查表法預失真器，以FPGA實現基頻數位電路，使其對一0.5μm GaAs pHEMT製程設計應用於WiMAX頻段的AB類功率放大器之AM/AM和AM/PM非線性特性分別做預失真，並且能產生單音、雙音和多音連續波之基頻訊號進行測試，結果證明數位預失真技術有效改善交互調變失真，使功率放大器可操作在更高功率範圍，進而提升轉換效率。

This thesis presents a transmitter with digital baseband predistorter to improve linearity of power amplifier. The architecture adopts the look-up table predistorter base on a polar scheme, and realizes the digital processor using FPGA. The predistortion for AM/AM and AM/PM nonlinear relations in a 0.5μm GaAs pHEMT class-AB power amplifier has been performed. One-tone, two-tone and multi-tone continuous waves generated by baseband signal are used for linearity test. The results demonstrate that the digital predistortion technique can effectively improve intermodulation distortion. With this technique, the power amplifier can operate in the higher power range to achieve a similar linearity and a higher efficiency.

第一章 序論 1
1.1 背景簡介 1
1.2 章節規劃 3
第二章 線性功率放大器之線性化技術 4
2.1 線性功率放大器之非線性效應 4
2.1.1 增益壓縮 4
2.1.2 交互調變失真 6
2.1.3 三階交越點 7
2.1.4 多音交互調變比例 8
2.1.5 鄰近通道功率比例 9
2.1.6 雙頻與複頻交互調變失真之關係 10
2.1.7 放大器的非線性AM/AM和AM/PM轉換特性 11
2.2 功率放大器線性化技術 12
2.2.1 回授式線性化技術 13
2.2.2 前饋式線性化技術 14
2.2.3 預失真線性化技術 15
2.3 基頻數位預失真線性化技術 18
2.3.1 多項式基頻數位預失真器 19
2.3.2 查表式基頻數位預失真器 20
2.3.3 查找表建表法 21
2.3.4 查找表索引函數 23
2.3.5 預失真後之等效增益考量 27
第三章 數位預失真電路設計 29
3.1 數位預失真電路架構與規劃 29
3.2 系統模擬環境 29
3.2.1 線性功率放大器行為模型 30
3.3 基頻數位處理器之設計與實現 32
3.3.1 基頻數位預失真電路設計 33
3.3.2 多音連續波測試訊號之產生 35
3.3.3 數位類比轉換器模組 36
3.3.4 基頻數位處理器功能驗證 37
第四章 採用基頻數位預失真技術之功率放大器線性化模擬與量測結果 43
4.1 2.6GHz 1-Watt Class-AB射頻功率放大器之量測結果 43
4.1.1 AM/AM非線性特性之量測結果 44
4.1.2 AM/PM非線性特性之量測結果 45
4.2 基頻數位預失真射頻發射機系統模擬與量測結果 46
4.2.1 單音訊號測試模擬與量測結果 47
4.2.2 雙音訊號測試模擬與量測結果 47
4.2.3 多音訊號測試模擬與量測結果 52
第五章 結論 58
參考文獻 59

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