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[1]. Wes Lukaszek, Kai G. Grambow, and Willie J. Yarbrough, “Test Chip Based Approach to Automated Diagnosis of CMOS Yield Problems”, 1990 February. [2]. Hung-Chih Li, “Nanometer Interconnect Test Structure Generation Software for Comprehensive Process Variation Modeling for SoC Designs”, 2005 June. [3]. Silvaco, CLEVER Reference Manual, Version 3.6.R, December 2005. [4]. SYNOPSYS, Raphael Reference Manual, Version 2003.09, September 2003. [5]. John P. Uyemura, Introduction to VLSI Circuits and Systems, John Wiley & Sons, 2002. [6]. 詹志禹, 賴世培 “基礎統計應用與EXCEL處理” page 172, 空大, 2005. [7]. N. Metropolis and S. Ulam. 1949. The Monte Carlo method. Journal of the American Statistical Association 44:335-341.
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