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References [1]. R. Sidhu and V. K. Prasanna. Fast regular expression matching using FPGAs. In Proc. of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '01), pp. 227-238, 2001. [2]. R. Franklin, D. Carver, and B.L. Hutchings. Assisting Network Intrusion Detection with Reconfigurable Hardware. In Proceedings of IEEE FCCM 2002, pp. 111-120, Apr. 2002.M. Anis, S. Areibi, and M. Elmasry, “Dynamic and Leakage Power Reduction in MTCMOS Circuits using an Automated Efficient Gate Clustering Technique,” Proc. of DAC, pp. 480–485, 2002. [3]. J. Moscola, J. Lockwood, R. P. Loui and M. Pachos. Implementation of a Content-Scanning Module for an Internet Firewall. In Proc. of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’03), Apr. 2003. [4]. C. R. Clark and D. E. Schimmel. “Scalable Parallel Pattern Matching on High Speed Networks,” in Proceedings of the Twelfth Annual IEEE Symposium on Field Programmable Custom Computing Machines 2004 (FCCM '04), 2004. [5]. A. V. Aho and M. J. Corasick. Efficient String Matching: An Aid to Bibliographic Search. In Communications of the ACM, 18(6):333–340, 1975. [6]. Young H. Cho and William H. Mangione-Smith, A Pattern Matching Co-processor for Network Security. In 42nd IEEE/ACM Design Automation Conference, Anaheim, CA, June 13-17, 2005. [7]. M. Aldwairi*, T. Conte, and P. Franzon. Configurable String Matching Hardware for Speeding up Intrusion Detection. In ACM SIGARCH Computer Architecture News, 33(1):99–107, 2005. [8]. S. Dharmapurikar and J. Lockwood. Fast and Scalable Pattern Matching for Content Filtering. In Proceedings of Symposium on Architectures for Networking and. Communications Systems (ANCS), Oct 2005.C. Long and L. He, “Distributed Sleep Transistor Network for Power Reduction,” IEEE Transactions on VLSI systems, vol. 12, no. 9, Sep. 2004. [9]. L. Tan and T. Sherwood. A high throughput string matching architecture for intrusion detection and prevention. In ISCA'05: 32nd Annual International Symposium on Computer Architecture, pp. 112-122, 2005.S. Pant, and D. Blaauw, “Static timing analysis considering power supply variations,” Proc. of ICCAD, 2005. [10]. H. J. Jung, Z. K. Baker, and V. K. Prasanna. Performance of FPGA Implementation of Bit-split Architecture for Intrusion Detection Systems. In IPDPS 2006: 20th International Parallel and Distributed Processing Symposium, 2006. [11]. M. Roesch. Snort- lightweight Intrusion Detection for networks. In Proceedings of LISA99, the 15th Systems Administration Conference, 1999.
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