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[1]B. Razavi, “Design considerations for direct-conversion receivers,” IEEE Trans. Circuits and Systems II, vol. 44, no. 6, pp. 428-435, June 1997. [2] Baltus, P.G.M., Dekker, R., “Optimizing RF front ends for low power” IEEE Trans. Circuits and Systems, Page(s):1546 – 1559, Oct. 2000 [3] Simon, M.K., “On the bit-error probability of differentially encoded QPSK and offset QPSK in the presence of carrier synchronization”, Communications, IEEE Transactions, Page(s):806 – 812, May 2006. [4] Li, Q. and Yuan, J.S. , “Linearity analysis and design optimisation for 0.18 μm CMOS RF mixer” Circuits Devices and Systems IEEE Proceedings , Page(s):112 – 118, April 2002. [5] Amrouche, F., Allam, R., Paillot, J.M., “Simulation and analytical calculation of the noise figure in HEMT gate mixers” Microwave Conference, 2003. 33rd European, Page(s):351 – 354, Oct. 2003 [6] Xiaohua Fan and Sanchez-Sinencio, E., “3-22GHz CMOS distributed single-balanced mixer” SOC Conference, Page(s):93 – 96, Sept. 2004. [7] Koizumi H., Nagata, S., Tateoka, K., Kanazawa, K., Ueda D., “A GaAs single balanced mixer MMIC with built-in active balun for personal communication systems” Microwave and Millimeter-Wave Monolithic Circuits Symposium Page(s):77 – 80, May 1995. [8]L. A. MacEachern, and T. Manku, “A charge-injection method for Gilbert cell biasing,” IEEE Canadian conf. on Electrical and computer Engineering, pp. 365-368, May 1998. [9]Sher Jiun Fang, See Taur Lee, D. J. Allstot, A. Bellaouar, “A 2 GHz CMOS even harmonic mixer for direct conversion receivers” IEEE Int. Symp. Circuit and System ISCAS, May 2002. [10] Tsung-Yu Yang, Hwann-Kaeo Chiou “A 28GHz Sub-Harmonic Mixer Using LO Doubler in 0.18-um CMOS Technology” Radio Frequency Integrated Circuit(RFIC) Symposium 2006, June 2006. [11] Byoung Gun Choi, Chul Soon Park.”A 5.8 GHz SiGe HBT direct-conversion I/Q-channel sub-harmonic mixer for low power and simplified receiver architecture” Microwave Symposium Digest, 2005 IEEE MTT-S International,, June 2005. [12]Ming-Feng Huang, Shuenn-Yuh Lee, C. J. Kuo, “A CMOS even harmonic mixer with current reuse for low power applications,” in Proc. Int. Symp. Low Power Electronics and Design, ISLPED ''04, pp. 290-295, Aug. 2004. [13]Ming-Feng Huang, C. J. Kuo, Shuenn-Yuh Lee, “A 5.25-GHz CMOS Folded-Cascode Even-Harmonic Mixer for Low-Voltage Application,” IEEE Trans Microwave Theory Tech., vol. 54, no. 2, pp. 660-669, Feb. 2006. [14] Bevin G. Perumana, Chang-Ho Lee, Joy Laskar, Sudipto Chakraborty,” A subharmonic CMOS mixer based on threshold voltage modulation” Microwave Symposium Digest, 2005 IEEE MTT-S International, June 2005. [15]Z. Zhang, Z. Chen, and J. Lau, “A CMOS self-mixing-free front-end for direct conversion applications,” in Proc. IEEE Int. Symp. Circuit and System ISCAS, pp. 219-222, May 2001. [16]M. Cohn, J. E. Degenford, B. A. Newman, “Harmonic Mixing with an Antiparallel Diode Pair,” IEEE Trans. Microwave Theory Tech., vol. 23, no. 8, pp. 667–673, Aug 1975. [17] Shimozawa M., Katsura T., Maeda K., Taniguchi E., Ikushima T., Suematsu N., Itoh K., “An even harmonic mixer using self-biased anti-parallel diode pair” Microwave Symposium Digest, 2002 IEEE MTT-S International, Page(s):253 – 256, June 2002. [18] Itoh, K., Iida A., Sasaki Y., Urasaki, S., “A 40 GHz band monolithic even harmonic mixer with an antiparallel diode pair” Microwave Symposium Digest, 1991., IEEE MTT-S International, Page(s):879 - 882 vol.2, June 1991. [19]Ming-Feng Huang, Shuenn-Yuh Lee, Chung J. Kuo, “A 5.25GHz CMOS Even Harmonic Mixer with an Enhancing Inductance,” in Proc. IEEE Int. Symp. Circuit and System ISCAS, vol. 3, pp. 2116-2119, May 2005. [20]Z. Zhang, Z. Chen, and J. Lau, “A 900MHz CMOS Balanced Harmonic Mixer for Direct Conversion Receivers,” in Proc. IEEE Radio and Wireless Conference RAWCON, pp. 219-222, September 2000. [21]P. Upadhyaya, M. Rajashekharaiah, Deukhyoun Heo, “A 5.6-GHz CMOS doubly balanced sub-harmonic mixer for direct conversion zero IF receiver,” IEEE Microelectronics and Electron Devices Workshop, pp. 129–130 June, 2004. [22]T. Yamaji ,and Tanimoto, ”A 2GHz Balance Harmonic Mixer for Direct-Conversion Receivers,” in Proc. IEEE Custom IC Conf., pp. 9.6.1-9.6.4, May 1997. [23] Vernet, J.L., “Real signals fast Fourier transform: Storage capacity and step number reduction by means of an odd discrete Fourier transform” Proceedings of the IEEE Page(s):1531 – 1532, Oct. 1971. [24] Yu, X.P., Do, M.A.; Lim, W.M., Yeo, K.S., Ma, J.-G., “Design and Optimization of the Extended True Single-Phase Clock-Based Prescaler” Microwave Theory and Techniques, IEEE Transactions on, Page(s):3828 – 3835, Nov. 2006. [25] Ji-Ren Y., Karlsson I., Svensson C., “A true single-phase-clock dynamic CMOS circuit technique” Solid-State Circuits, IEEE Journal, Page(s):899 – 901, Oct. 1987. [26] Yamauchi Y. , Nagata K. , Nakajima, O. , Ito H. , Nittono T. , Ishibashi T., “AlGaAs/GaAs HBT dynamic frequency divider constructed of a single D-type flip-flop” Electronics Letters Page(s):1109 – 1110, Aug. 1988. [27] Frohman-Bentchkowsky D. , Vadasz, L., “DC analysis of an MOS source follower” Solid-State Circuits, IEEE Journal, Page(s):306 - 307 ,Sep. 1968. [28] Baker B., Toumazou C., ”Low noise CMOS common gate optical preamplifier using active feedback” Electronics Letters, Page(s):2235 – 2237, Nov. 1998.
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