跳到主要內容

臺灣博碩士論文加值系統

(98.82.120.188) 您好!臺灣時間:2024/09/11 17:02
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

我願授權國圖
: 
twitterline
研究生:錢韋寧
研究生(外文):Wei-Ning Chian
論文名稱:連通柱不連續結構之電氣特性與補償設計
論文名稱(外文):Electrical Characteristics of Via Discontinuity and Compensation Design
指導教授:吳瑞北
指導教授(外文):Ruey-Beei Wu
學位類別:碩士
校院名稱:國立臺灣大學
系所名稱:電信工程學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:95
語文別:中文
論文頁數:92
中文關鍵詞:連通柱開路殘段膠囊狀清潔環
外文關鍵詞:viavia stubcapsule-shaped anti-pad
相關次數:
  • 被引用被引用:1
  • 點閱點閱:394
  • 評分評分:
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
在多層印刷電路板當中,連通柱結構總是被用來連結位於不同層的傳輸線。隨著資料傳輸速率到達數個十億位元的範圍以上,連通柱結構對於信號完整度的影響就必須要被考慮。通常連通柱結構是呈現電容的效應,因此在輸入訊號端可以觀察到電容性的反射波形。
為了減少反射雜訊,本論文使用高阻抗元件來改善連通柱結構所造成的不連續效應,並提出一套有系統的設計流程來加以使用。此外,更提出了新穎的補償方法,即藉由改變清潔環的形狀,使其從圓形變成膠囊狀來達到更寬頻的補償。此補償方法也可有效的應用在差模連通柱結構上。同時也結合二種補償方法對於包含開路殘段的連通柱結構作一補償分析,使整體補償設計更為完整。最後利用時域模擬與量測結果來驗證此方法的正確性。
In the multilayer printed circuit boards (PCBs), the through-hole via transitions are always utilized to link the signal traces between different layers. As the data rates increase up to several GHz, it is essential to consider the significant impact of vias on signal integrity of high-speed digital systems. Usually, it is found to be capacitive and would cause a voltage drop in the time-domain reflectometry (TDR) waveform.
To reduce this reflection noise, this thesis describes a systematic design procedure to improve the electrical performance of multilayer through-hole via transitions by using the high-impedance interconnects. In addition to the thinner transmission line, a novel matching structure is proposed by changing the anti-pad shape from circular to capsular to achieve the better broadband matching condition. The compensation method also applies to a differential via transition successfully. To make the design of compensation more complete, a way of combining two compensation methods applies to the via stub structures. This method is demonstrated by the time-domain simulation and measurements, accordingly.
第一章 研究動機與簡介 .................................. 1
1-1 研究動機 .................................................................................................... 1
1-2文獻回顧 ..................................................................................................... 2
1-3章節概要 ..................................................................................................... 3
1-4貢獻 ............................................................................................................. 4
第二章 連通住結構特性與等效電路模型 .................... 7
2-1連通柱不連續效應分析 .................................................................................. 7
2-1-1 一般連通柱的特性分析 .......................................................................... 9
2-1-2 單根與差模開路殘段連通柱的電路分析與共振特性 .......................... 9
2-2連通柱等效電路 ............................................................................................... 13
2-2-1 單根連通柱等效電路模型 ........................................................................... 13
2-2-2 差模連通柱等效電路模型 ....................................................................... 17
第三章 電容性連通柱結構之補償方法與設計流程 ............33
3-1 補償方法的介紹 .............................................................................................. 33
3-1-1 設計概念與實現 ...................................................................................... 33
3-1-2 設計流程 .................................................................................................. 37
3-2 單根連通柱的補償設計 .................................................................................. 39
3-2-1 第一種補償方法-細線補償 ................................................................... 39
3-2-2 第二種補償方法-膠囊狀(capsule-shaped)的清潔環補償方法 ............. 41
3-2-3 細線補償和膠囊狀清潔環補償的比較 ................................................. 42


3-3 差模連通柱的補償設計 ................................................................................... 43
3-3-1 第一種補償方法-細線補償 .................................................................... .44
3-3-2 第二、三種補償方法-膠囊狀的清潔環補償方法 ................................. 45
3-3-3 細線補償和膠囊狀清潔環補償的比較 .................................................. .46
3-4 實驗模擬與驗證 .............................................................................................. 47
3-4-1 單根連通柱補償方法的實驗驗證 ........................................................... 47
3-4-2 差模連通柱補償方法的實驗驗證 ........................................................... 48
第四章 開路殘段連通柱的補償方法與設計流程 ..............71
4-1 單根開路殘段連通柱的補償設計 .............................................................. 71
4-2 差模開路殘段連通柱的補償設計 .............................................................. 74
第五章 結論 ............................................83
參考文獻 ...............................................85
[1] E. Pillai and W. Wiesbeck, “Derivation of equivalent circuits for multilayer printed circuit board discontinuities using full wave models,” IEEE Trans. Microwave Theory Tech., vol. 42, pp.1774-1783, September 1994.
[2] E. Laermans, J. D. Geest, D. Zutter, F. Olyslager, S. Sercu, and D. Morlion, “Modeling complex via hole structures,” IEEE Trans. Adv. Package, vol. 25, pp. 206-213, May 2002.
[3] J. Fan, J. L. Drewniak, and J. L. Knighten, “Lumped-circuit model extraction for vias in multilayer substrates,” IEEE Trans. Electromagn. Compat., vol. 45, pp. 272-280, May 2003.
[4] T. Wang, R. F. Harrington, and J. R. Mautz, “Quasi-static analysis of a microstrip via through a hole in a ground plane,” IEEE Trans. Microwave Theory Tech., vol. 36, pp. 1008-1013, June 1988.
[5] S. Luan, G. Selli, J. Fan, M. Lai, J. L. Knighten, N. W. Smith, R. Alexander, G. Antonini, A. Ciccomancini, A. Orlandi, and J. L. Drewniak, “SPICE model libraries for via transitions,” IEEE Int. Symp. Electromagn. Compat., vol. 2, pp. 859-864, August 2003.
[6] E. Laermans, J. D. Geest, D. De Zutter, F. Olyslager, S. Sercu, and D. Morlion, “Modeling differential via holes,” IEEE Trans. Adv. Package, vol. 24, pp. 357-363, August 2001.
[7] S. Luan, G. Selli, J. L. Drewniak, A. D. Luca, G. Antonini, A. C. Scogna, and A. Orlandi, “Extraction of a SPICE via model from full-wave modeling for differential signaling,” IEEE Int. Symp. Eletromagn. Compat., vol. 2, pp. 577-582, August 2004.
[8] H. W. Johnson and M. Graham, High-speed Signal Propagation, Chapter 5, Prentice-Hall, 1993.
[9] S. H. Hall, G. W. Hall, and J. A. Mccall, High-Speed Digital System Design, Chapter 5, John Wiley & Sons, Inc., 2000.
[10] S. W. Deng, J. K. Mao, T. H. Hubing, J. L. Drewniak, J. Fan, J. L. Knighten, N. W. Smith, R. Alexander, and C. Wang, “Effects of open stubs associated with plated through-hole vias in backpanel designs,” IEEE Int. Symp. on EMC, vol. 3, pp. 1017-1022, August 2004.

[11] T. Kushta, K. Narita, T. Kaneko, T. Saeki, and H. Tohya, “Resonance stub effect in a transition from a through via hole to a stripline in multilayer PCBs,” IEEE Microw. Wireless Compon. Lett., Vol. 13, pp. 169-171, May 2003.
[12] H. H. Jhuang and T. W. Huang, “Design for electrical performance of wideband multilayer LTCC microstrip-to-stripline transition,” in Proc. 6th Electron. Packag. Tech. Conf., pp. 506-509, December 2004.
[13] D. H. Kwon, J. Kim, K. H. Kim, S. C. Choi, J. H. Lim, J. H. Park, L. Choi, S. W. Hwang, and S. H. Lee, “Characterization and modeling of a new via structure in multilayered printed circuit boards,” IEEE Trans. Comp. Packag. Technol., Vol. 26, No. 2, pp. 483-489, June 2003.
[14] C. L. Wang and R. B. Wu, “Modeling and design for electrical performance of wideband flip-chip transition,” IEEE Trans. Adv. Package, Vol. 26, pp. 385-395, November 2003.
[15]許顧騰,利用類神經網路分析連通柱不連續結構之電氣特性與製程解空間,國立臺灣大學碩士論文,2006年6月
[16] High Frequency Structure Simulator, Version 10.0, Ansoft Corporation, (www.ansoft.com).
[17] Microwave Studio, Version 5.1, Computer Simulation Technology, (www.cst.com).
[18] D. M. Pozar, Microwave Engineering, Chapter 4, John Wiley, 1998.
[19]吳瑞北、何起予、歐陽昌廉、邱柏源,傳輸線的時域模擬,國科會計畫研究報告,1991年9月。
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top