臺灣博碩士論文加值系統

今日全球正朝向高度資訊化的方向邁進，藉由資訊的傳遞交流，與架構全球性的通訊資訊網，使得我們不再受限於地域與空間的限制。因此，積極開發新的內藏離散式被動元件在基板內的製程技術，以提高產品的附加價值與市場競爭力，並拓展產品的應用層面與廣面，已是封裝基板業者在面臨日益激烈的競爭環境裡，所必須採行的因應策略。
在這個內藏離散式被動元件的基板研究方面，介紹如何將離散式0402電容內埋在一有機材料封裝基板內部之相關製程及後續電氣特性改善頻估。藉由導通孔(PTH)或是雷射埋孔(Build Via)將離散電容跟基板線路整合在一起。電性效能改善評估研究上，利用向量網路分析儀結合高頻探針座probing系統進行相關量測，並利用 Ansoft 3D EM軟體HFSS進行電路特性模擬。根據本研究結果，將電容內埋在封裝基板內，除可有效結省表面黏著(SMT)所需基板面積，增加基板線路佈線自由度外，利用離散元件高品質因素(Q-factor)特性以抑制高速訊號切換雜訊應用上，內埋離散元件抑制效果明顯比表面黏著離散元件於基板表面抑制效果更佳。

The world is turning toward the high information today of the direction move forward, delivering exchanges by the information with configuring global communication information a net, making us no longer be subjected to restriction of being limited by the region and space. Develop therefore and actively new of passive component in the manufacturing process technique in the substrate to raise additional value and market competition ability of product, and expand the applied level of product and face widely, substrate manufacturing in face the increasingly vigorous competition environment, the strategy must be take. and cost/area saving denser packaging.
Hide the substrate of passive component to study aspect in this, introduce how to cover up a 0402 electric capacities in a related manufacturing process which substrate inner part and follow-up electricity characteristic an improvement. By through hole or Laser drill hole to integrate long-lost electric capacity heel substrate circuit together. Make use of the vector network analysis instrument to combine a high Pin probe probing system to carry on a related measurement, and make use of the Ansoft 3 D EM software HFSS to carry on electric circuit characteristic emulation. According to this research result, cover up in substrate pack inside electric capacity, in addition to canning knot province surfacing to stick to the substrate area neededing effectively, increasing the substrate circuit Bu line freedom, make use of passive component high-quality factor characteristic to cut over by repressing a high-speed signal a noise application up, inside cover up a passive component to repress result to compare surface to stick to a passive component obviously to repress result in the substrate surface better.

中文摘要 i
英文摘要 ii
誌謝 iv
目錄 v
表目錄 vi
圖目錄 vii
第一章、緒論 01
1.1 研究動機與源起 01
1.2 文獻回顧與研究方向 02
1.3 全文架構 03
第二章、內藏離散式被動元件基板製程介紹 05
2.1 內藏離散式被動元件基板規格及測試條件 05
2.2 內藏離散式被動元件基板設計 06
2.3 內藏離散式被動元件基板製作流程(一) 08
2.4 內藏離散式被動元件基板製作流程(二) 14
2.5 內藏離散式被動元件基板製作流程(三) 20
2.6 對照組基板製作 26
2.7 內藏離散式被動元件基板成果確認 30
第三章、內藏離散式被動元件基板可靠性測試 38
3.1 內藏離散式被動元件基板測試條件 38
3.2 內藏離散式被動元件基板製程(一)測試結果 41
3.3 內藏離散式被動元件基板製程(二)測試結果 43
第四章、內藏離散式被動元件基板電性 46
4.1 內藏離散式被動元件基板電性資料 46
4.2 內藏離散式被動元件基板的電能效應 47
4.3 沒有內藏離散式被動元件的電能效應 49
4.4 有與沒有內藏離散式被動元件的電能比較 51
4.5 內藏離散式被動元件與外部粘黏被動元件電能的比較 52
第五章、結論 53
參考文獻 54

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