|
[1].IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements Part 15.4: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-WPANs), IEEE. 1 October 2003 [2].Ivan E. Sutherland and Jo Ebergen, Computers Without Clocks, Asynchronous Chips Improve Computer Performance by Letting Each Circuit Run As Fast As It Can, From Scientific American, August 2002. [3].SoCAD, A CAD tool for SoC Design, 4C Lab of CSE department of Tatung University, http://4c.cse.ttu.edu.tw/snipsnap/space/SoCAD [4].SPI-Serial Peripheral Interface, http://www.mct.net/faq/spi.html. [5].ACEX 1K Programmable Logic Family Data Sheet, http://www.altera.com [6].MC13192 RF Daughter Card Fact Sheet, http://www.freescale.com [7].ITRS (2001), International Technology Roadmap for Semiconductors, 2001 Edition, pp. 285~317. [8].Chih-Chiang Nien. Compiling Java Programs into Modified Activity Diagrams, Master Thesis, CSE department of Tatung University, June 2003. [9].Shu-Ming Chang. Compiling Activity Diagrams into Self-timed Systems in VHDL. Master Thesis, CSE department of Tatung University, June 2003. [10].Ming-Hsiu Chiang. Design and Implementation of Optimization Algorithms in a CAD Tool for System-on-Chip Design, Master Thesis, CSE department of Tatung University, June 2003. [11].Jens Muttersbach, Thomas Villiger, Hubert Kaeslin, Norbert Felber, and Wolfgang Fichtner. Globally-Asynchronous-Locally-Synchronous Architectures to Simplify the Design of On-Chip Systems, in Proceedings of the 12th IEEE International ASIC/SOC Conference, pp.317~321, Sept. 1999. [12].Simon Moore, George Taylor, Robert Mullins, Peter Robinson. Point to Point GALS Interconnect, in Proc. of Int. Symp. on Asynchronous Circuits and Systems, pp. 769~775, Apr. 2002. [13].Tiberiu Chelcea, Steven M. Nowick, “Robust interfaces for mixed-timing systems” IEEE Transactions on Very Large Scale Integration (VLSI), Volume 12, Issue 8, pp. 857~873, Aug. 2004. [14].Ruei-Jyun Lin. Design and Implementation of Interfaces for Mixed-clock and Asynchronous to Synchronous Systems, Master Thesis, CSE department of Tatung University, June 2005. [15].MC13192-MC13193 Reference Manual, http://www.freescale.com
|