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研究生:陳智偉
研究生(外文):Chih Wei Chen
論文名稱:氟化二氧化鉿低溫多晶矽薄膜電晶體之特性與可靠度探討
論文名稱(外文):Characteristics and Reliability of LTPS TFTs with Fluorinated High-K HfO2 Gate Dielectrics
指導教授:賴朝松
指導教授(外文):C. S. Lai
學位類別:碩士
校院名稱:長庚大學
系所名稱:光電工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:96
論文頁數:88
中文關鍵詞:薄膜電晶體二氧化鉿
外文關鍵詞:TFTsHfO2
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此論文應用高介電材料二氧化鉿做為低溫多晶矽薄膜電晶體之介電層。我們在複晶矽表面上,利用不同表面處理技術來改善二氧化鉿和複晶矽之間的界面,因而提高低溫多晶矽薄膜電晶體之特性。
首先,我們由第二章實驗結果得知,當在二氧化鉿和複晶矽之間加入一層很薄的二氧化矽,可使複晶矽電容有較大的崩潰電壓和較低的漏電流。主要是因為二氧化鉿和複晶矽之間會容易形成一層界面層。但如果在二氧化鉿和複晶矽之間有一層二氧化矽,就可降低界面層,因而減少電荷補捉。主要歸因於二氧化矽和複晶矽之間有較好的鍵結。
接著,由第三章結果得知,在複晶矽表面上經由氫氟酸浸泡和四氟化碳電漿之處理,其電性上會有所改善。而經由氫氟酸浸泡和四氟化碳電漿之處理會具有較好的的次臨界擺幅 (subthreshold swing)、低的臨界電壓 (threshold voltage) 及高的元件開關電流比 (On/Off current ratio)。
最後,我們針對四個不同在複晶矽表面所做的處理,量測正偏壓應力和正偏壓溫度不穩定性的可靠度分析比較。經過測試後可發現經過四氟化碳電漿處理過後,元件的漏電流和電導較不會受到應力的影響。主要原因在於複晶矽中的懸浮鍵被氟離子有效的去填補。
In this thesis, high-performance low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) integrated high-K HfO2 gate dielectric. We used various surface treatment techniques to improve HfO2/poly-Si interface properties. Therefore, we will compare characteristic and reliability of four surface treatments on the poly-Si film.
From the chapter 2 experiment result, if ultra-thin SiO2 film is inserted beneath the HfO2, the initial SiO2 interfacial layer beneath the HfO2 can make the high-K insulator/polysilicon interface similar to a SiO2/polysilicon interface, so that the charge trapping and interface states in the HfO2 insulator/polysilicon structure are reduced and this can reduce the leakage current on polyoxide capacitors.
Another from the chapter 3 experiment result, the HfO2 LTPS TFT with HF dip and CF4 plasma treatments exhibits better electrical properties including VTH, field-effect mobility, S.S., on-state characteristics and Ion/Ioff. In conclusion fluorine on poly-Si film, have been applied to effectively improve the device performance by reducing the trap state densities.
Finally, the positive-bias stress (PBS) and positive-bias temperature instability (PBTI) reliability experiment has been finished discussion for four characteristic of surface treatments on the poly-Si film. The improvement is a result of the fluorine passivation, which reduces trap-state density and forms stronger Si–F bonds in place of the weak bonds in the poly-Si channel and at the HfO2/poly-Si interface.
Acknowledgment i
Chinese Abstract ii
English Abstract ii
Contents iv
Content of Figures vi
List of Tables xi
Chapter 1 Introduction……………………………………………………….1
1.1 Background………………………………………………………1
1.2 Motivation………………………………………………………3
1.3 Thesis Organization…………………………………………5
Reference…………………………………………………………6
Chapter 2 Investigation of Electrical Characteristics on HfO2/SiO2/Poly-Si Structure..............................10
2.1 Introduction……………………………………………....10
2.2 Experiments…………………………………………………11
2.3 Results and Discussion………………………………….12
2.4 Summary……………………………………….……………….13
Reference……………………………………………………………23
Chapter 3 Low-Temperature Polycrystalline Silicon Thin Film Transistor with Fluorinated High-K HfO2 Gate Dielectrics by HF Dip and CF4 Plasma treatment………………………………………24
3.1 Introduction…………………………………………………24
3.2 Experiments……………………………………………………25
3.3 Results and Discussion…………………………………27
3.4 Summary………………………………………………………..29
Reference…………………………………………………………44
Chapter 4 Reliability of LTPS TFTs with Fluorinated High-K HfO2 Gate Dielectrics by HF Dip and CF4 Plasma treatment…46
4.1 Introduction……………………………………………….46
4.2 Experiments……………………………………………………47
4.3 Results and Discussion…………………………………48
4.4 Summary………………………………………………………51
Reference…………………………………………………………70
Chapter 5 Conclusions and Future Works....................72
5.1 Conclusions……………………………………………………72
5.2 Future works…………………………………………………73


Content of Figures
Fig. 2-1 Schematic of process for fabrication of polyoxide capacitors…...17
Fig. 2-2 The high frequency C-V characteristics of aluminum/HfO2/n+-polysilicon with a CET 76.38 Å…………….18
Fig. 2-3 The high frequency C-V characteristics of aluminum/HfO2/SiO2/n+-polysilicon with a CET 219.9 Å………18
Fig. 2-4 The high frequency C-V characteristics of aluminum/ SiO2/n+-polysilicon with a CET 132.6 Å………………………...19
Fig. 2-5 The high frequency C-V characteristics of aluminum/ SiO2/HfO2/n+-polysilicon with a CET 116.5 Å…………………..19
Fig. 2-6 The J-V characteristics of the four structures on n+-polysilicon films for the top gate applied with a negative bias………………20
Fig. 2-7 The J-V characteristics of the four structures on n+-polysilicon films for the top gate applied with a positive bias……………….20
Fig. 2-8 The curves of gate voltage shifts (△Vg) versus stress time of the four structures n+-polysilicon films for the top gate applied with a negative gate constant current (under -0.41 μA/cm2) stress……..21
Fig. 2-9 The curves of gate voltage shifts (△Vg) versus stress time of the four structures n+-polysilicon films for the top gate applied with a negative gate constant current (under 4.1 μA/cm2) stress………..21
Fig. 2-10 The Weibull distribution Qbd plots for the four structures n+-polysilicon films for the top gate applied with a negative gate bias………………………………………………22
Fig. 2-11 The Weibull distribution Qbd plots for the four structures n+-polysilicon films for the top gate applied with a positive gate bias……………………………………………22
Fig. 3-1 Schematic of process for fabrication of LTPS TFTs......33
Fig. 3-2 SIMS profile analysis of fluorine for the poly-Si films with various surface treatments………………………………34
Fig. 3-3 Typical C-V characteristics of the MOS capacitor with a HfO2 gate dielectric………………………………………….34
Fig. 3-4 Output characteristics of the LTPS TFTs using HfO2 as gate dielectric……………………………………………………….35
Fig. 3-5 Transfer characteristics of the HfO2 LTPS TFTs with various surface treatments at VDS = 0.1 V………………35
Fig. 3-6 The grain-boundary trap-states of the various surface treatment conditions……………………………………………36
Fig. 3-7 Control of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………36
Fig. 3-8 CF4 of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃……………...37
Fig. 3-9 HF of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………………37
Fig. 3-10 HF + CF4 of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………38
Fig. 3-11 Control of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………38
Fig. 3-12 CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………39
Fig. 3-13 HF of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………39
Fig. 3-14 HF + CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………40
Fig. 3-15 Illustrates the strong Si-F bonds replace the dangling bonds by HF dip and CF4 plasma treatment……………41
Fig. 4-1 Schematic of process for fabrication of LTPS TFTs……………54
Fig. 4-2 Schematic cross-sectional diagram of the LTPS TFTs with stresses conditions…………………………………………………55
Fig. 4-3 Output characteristics of the LTPS TFTs using HfO2 as gate dielectric…………………………………………………………56
Fig. 4-4 Transfer characteristics of the HfO2 LTPS TFTs with various surface treatments at VDS = 0.1 V………………56
Fig. 4-5 The grain-boundary trap-states of the various surface treatment conditions……………………………………………57
Fig. 4-6 Control of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………57
Fig. 4-7 CF4 of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………58
Fig. 4-8 HF of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………………58
Fig. 4-9 HF + CF4 of output characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………59
Fig. 4-10 Control of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………59
Fig. 4-11 CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………60
Fig. 4-12 HF of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃…………………60
Fig. 4-13 HF + CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 1000s stresses at 25 ℃………..61
Fig. 4-14 Control of output characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………61
Fig. 4-15 CF4 of output characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………………62
Fig. 4-16 HF of output characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………………62
Fig. 4-17 HF + CF4 of output characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………63
Fig. 4-18 Control of transfer characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………63
Fig. 4-19 CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………………64
Fig. 4-20 HF of transfer characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………………64
Fig. 4-21 HF + CF4 of transfer characteristics of the HfO2 LTPS TFTs before and after 50s stresses at 100 ℃……………65
Fig. 4-22 Energy band diagram of the HfO2 LTPS TFTs under PBTI stresses [6]………………………………………………………69


List of Tables
Table 1-1 High-K dielectric candidate………………………………2
Table 2-1 Four structure of gate dielectric……………………14
Table 3-1 Four process conditions of Poly-Si surface treatments…………30
Table 3-2 Device parameters for poly-Si HfO2 LTPS TFTs with various surface treatment at VDS=0.1 V……………………42
Table 3-3 Device parameters of the LTPS TFTs before and after 1000s of PBT stresses at 25 ℃………………………………43
Table 4-1 Device parameters for poly-Si HfO2 LTPS TFTs with various surface treatment at VDS=0.1 V……………………66
Table 4-2 Device parameters of the LTPS TFTs before and after 1000s of PBT stresses at 25 ℃………………………………67
Table 4-3 Device parameters of the LTPS TFTs before and after 50s of PBT stresses at 100 ℃…………………………………68
Table 4-4 Degradation of electrical characteristics and corresponding possible degradation mechanisms [6]……………69
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