臺灣博碩士論文加值系統

當製程技術進入深次微米(deep submicron)之後，使得系統晶片(system-on-chip, SoC)的設計變的越來越複雜，加上一個晶片內部可能包含越來越多的電晶體，系統晶片因為雜訊或輻射性干擾而產生軟性錯誤(soft error)的機率也會明顯增加，因此就必須在系統晶片設計的過程中加入容錯設計來提高系統的可靠度。在將容錯設計加入系統晶片時有二個很重要的問題，那就是如何更早的在系統設計初期去驗證其容錯能力，以及如何更快並且有效的提供系統晶片在設計時關於FMEA(Failure Mode and Effect Analysis)的資料，進而降低重新設計的成本。而這兩個問題的解決方式都仰賴錯誤注入實驗能否提供有效數據給系統設計者。
在本篇論文中我們以不用更改系統內部資源為前題下，提出一個適用於一般嵌入式系統的軟體實踐錯誤注入(Software-Implemented Fault Injection, SWIFI)方法。而且利用此方法對暫存器進行錯誤注入實驗，利用實驗的結果來針對系統晶片的暫存器單元進行FMEA及失敗類型的分類。最後我們根據不同失敗類型，找出其可能導致的暫存器單元。透過這樣的分析，提供有效的數據給系統設計者。讓設計者根據其需求，選擇最需要保護的元件。因此對於嵌入式系統的設計者來說，可以利用此錯誤注入方式來驗證其原始系統的核心控制單元對於錯誤的容忍度，進而了解其中一旦發生錯誤時，最容易造成系統失敗的暫存器。這也是本篇論文所提供的軟體實踐錯誤注入方法最重要的貢獻。
在本篇論文中，會說明我們如何開發軟體實踐錯誤注入方法，並利用此方法對實體的嵌入式系統開發平台中的暫存器單元進行錯誤注入實驗，透過FMEA與實驗結果分析，提出在ARM處理器使用者模式下，暫存器單元受到軟性錯誤影響而產生失敗的機率以R11：95.5%、SP：66.8%、PC：82.1%最高，我們提供這些有效的數據給容錯設計者，作為系統開發初期設計的依據。

As system-on-chip (SoC) becomes more and more complicated, and contains a large number of transistors, the SoC could encounter the reliability problem due to the increased likelihood of faults or radiation-induced soft errors especially when the chip fabrication enters the deep submicron technology. Thus, it is essential to employ the fault-tolerant techniques in the design of SoC to guarantee a high operational reliability in critical applications. An important issue in the design of SoC with fault tolerance is how to validate the robustness of the systems. Normally, the fault injection approach is employed to verify the capability of a fault-tolerant system.
In this paper, we propose a software-implemented fault injection technique adopt to general embedded systems. We employ this method injected faults into registers of the processor. Finally we conclude 8 kinds of failure mode and valuable FMEA statistics and analysis for the system designer, and according to the requirement of the system design to protected the component if significance of them.

目錄 I
圖表目錄 II
表格目錄 III
第一章 簡介 1
1-1 背景介紹 2
1-1-1 錯誤型態 2
1-1-2 錯誤注入簡介 4
第二章 相關研究、研究動機、問題定義 10
2-1 相關研究 10
2-2 研究動機 13
2-3 問題定義 15
第三章 軟體錯誤注入方法開發及架構 17
3-1 LINUX 訊號 17
3-3 PTRACE函式特性 19
3-4 軟體錯誤注入流程 22
3-4 ARM暫存器特性 23
3-5 失敗模式與其效應分析(FMEA) 25
3-5-1 FMEA簡介 25
3-5-2 FMEA的形式 25
第四章 實驗設定與規劃 27
4-1 實驗描述 27
4-1-1 錯誤注入實驗平台簡介 27
4-2 實驗規劃 30
4-3 失敗類型分類 31
第五章 模擬結果與分析 33
5-1 模擬結果與分析 33
5-2 失敗類型示意圖 42
第六章 結論與未來展望 45

[1]. C. Constantinescu, “Impact of Deep Submicron Technology on Dependability of VLSI Circuits,” IEEE Intl. Conf. On Dependable Systems and Networks (DSN), pp. 205-209,2002.
[2]. Alfredo B ,Paolo P. “Fault injection techniques and tools for embedded systems reliability evaluation,” ISBN: 978-1-4020-7589-6
[3]. A. Avizienis, J.-C. Laprie, B. Randell, and C. Landwehr, "Basic Concepts and Taxonomy of Dependable and Secure Computing," IEEE Transactions on Dependable and Secure Computing, vol. 1, pp. 11-33, 2004.
[4]. H. Madeira, M. Rela, F. Moreira, J. G. Silva, “RIFLE: A General Purpose Pin-level Fault Injector”, 1st European Dependable Computing Conference, Berlin, Germany, pp. 199-216,1994, Springer-Verlag,
[5]. U. Gunneflo, J. Karlsson, J. Torin, “Evaluation of Error Detection Schemes Using Fault Injection by Heavy-ion Radiation”, IEEE 19th. International Symposium on Fault Tolerant Computing (FTCS-19), pp. 340-347, Chicago, MI, USA, June 1989,
[6]. G.A. Kanawati, N.A. Kanawati, and J.A. Abraham, “FERRARI: A Flexible Software-Based Fault and Error Injection System,” IEEE Trans. on Computers, Feb. 1995, vol. 44, no. 2, pp. 248-260.
[7]. Sieh, “Fault-Injector using UNIX ptrace Interface”, Internal Report 11/93, IMMD3, Universität Erlangen-Nürnberg, 1993.
[8]. André Fidalgo, Manuel Gericota, Gustavo Alves, José Ferreira” Using NEXUS Compliant Debuggers for Real Time Fault Injection on Microprocessors ” Proceedings of the 19th annual symposium on Integrated circuits and systems design 10-12 July 2006 Page(s):6
[9]. W.-L. Kao, R.K. Iyer, and D. Tang, “FINE: A Fault Injection and Monitoring Environment for Tracing the UNIX System Behavior under Faults,” IEEE Trans. on Software Eng., Nov. 1993, vol. 19, no. 11, pp. 1105-1118.
[10]. J. Carreira, H. Madeira, and J.G. Silva, “Xception: A Technique for the Experimental Evaluation of Dependability in Modern Computers,” IEEE Trans. on Software Eng., Feb.1998, vol. 24, no. 2, pp. 125-136.
[11]. Jarboui, T.; Arlat, J.; Crouzet, Y.; Kanoun, K.” Experimental analysis of the errors induced into Linux by three fault injection techniques” International Conference on Dependable Systems and Networks, June 2002 Page(s):331 – 336
[12]. M.-C. Hsueh, T.K. Tsai, and R.K. Iyer, “Fault Injection Techniques and Tools,” Computer, Apr. 1997, vol. 30, no. 4, pp. 75-82.
[13]. J.H. Barton, E.W. Czeck, Z.Z. Segall, and D.P. Siewiorek, “Fault Injection Experiments Using FIAT,” IEEE Trans. Computers, Apr. 1990, vol. 39,no. 4, pp. 575-582.
[14]. Pedro Yuste, Juan-Carlos Ruiz-Garcia, Lenin Lemus, Pedro J. Gil ”Non-intrusive Software-Implemented Fault Injection in Embedded Systems”. LADC 2003: 23-38
[15]. Fidalgo, A.V.; Alves, G.R.; Ferreira, J.M.” Real time fault injection using a modified debugging infrastructure” On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International 10-12 July 2006 Page(s):6
[16]. Marco Murciano, Massimo Violante ”Validating the Dependability of Embedded Systems through Fault Injection by means of Loadable Kernel Modules” High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE
[17]. Raphael R. Some, Won S. Kim, Garen Khanoyan, Leslie Callum, Anil Agrawal, John J. Beahan, "A Software-Implemented Fault Injection Methodology for Design and Validation of System Fault Tolerance," p. 0501, The International Conference on Dependable Systems and Networks (DSN'01), 2001
[18]. Jun Xu, Zbigniew Kalbarczyk and Ravishankar K. Iyer. HiPerFI: A High-Performance Fault Injector. In Proc. of IEEE Intl' Conf. on Dependable Systems and Networks (Fast Abstract), June, 2002.
[19]. J. Christmansson, M. Hiller and M. Rimén, “An Experimental Comparison of Fault and Error Injection”, in Proc. ISSRE'98, Paderborn, Germany, 1998, pp. 369-378.
[20]. C. Weaver and T. Austin. A fault tolerant approach to microprocessor design. In Proceedings of the International Conference on Dependable Systems and Networks (DSN), pages 411-420, July 2000
[21]. SystemC website: http://www.systemc.org
[22]. Kun-Jun Chang and Yung-Yuan Chen, “System-Level Fault Injection in SystemC Design Platform”, 8th International Symposium on Advanced Intelligent Systems, pp. 354-359, Sept. 2007.
[23]. AAPCS, “Procedure Call Standard for the ARM Architecture”
[24]. ATPCS, “ The ARM-THUMB Procedure Call Standard”
[25]. IEC 812, Analysis Techniques for System Reliability-Procedure for Failure Mode and Effects Analysis:FMEA, 1985.
[26]. Yasser Sedaghat, Seyed Ghassem Miremadi, Mahdi Fazeli. “A Software-Based Error Detection Technique Using Encoded Signatures”. Symposium on Defect and Fault-Tolerance in VLSI Systems 2006: 389-400