臺灣博碩士論文加值系統

本論文主要討論如何根據已知的HOY無線收發機系統規格來逐步完成與實現無線收發機硬體平台。
討論範圍包含零件的選用、系統模擬、電路設計、電路驗證、系統整合、PCB電路板佈局、程式化控制等。

第二章與第三章主要針對ATE做逐步討論，第四章與第五章則為討論DUT；第六章為ATE與DUT的PCB 四層電路板使用簡介。

論文當中系統模擬所用到的軟體為安捷倫高頻模擬軟體ADS2005A 裡面的Budget Analysis功能，模擬分析包含系統P1dB、Noise Figure；系統控制利用單晶片8051，使用Keil C 做C語言設計與Debug，控制系統動作Sweep、AGC、AFC等功能。

In this thesis, the main idea is how to take advantage of the used specifications and then to design, implement the HOY wireless test platform, a radio frequency transceiver, step by step.

The scope of discussions include— components survey, system simulation, circuit design, system integrated, PCB Layout, and stylization control etc.
First, discuss step by step with the chapter 2 and 3, which aim at ATE; and then the chapter 4 and 5, which discuss with DUT; finally, discuss the chapter 6, which offers a brief introduction in ATE and the four-layer PCB circuit board of DUT.

In this thesis, the software used in the system of simulation is Budget analysis function, ADS2005A of Agilent Ratio frequency simulation software. The simulation analysis contain P1dB, and Noise Figure systems；and the system of control which used keil C to design C programming language and debug is used micro 8051 to administer the functions like Sweep, AGC, and AFC.

摘要......................................................1
Abstract..................................................2
誌 謝.....................................................3
目錄.......................................................5
圖目錄....................................................10
表目錄....................................................14
第一章 緒論................................................15
1-1 研究動機...............................................15
1-2 研究目標...............................................16
1-3 研究流程...............................................17
第二章 ATE收發機系統規劃.....................................19
2-1 ATE系統規劃............................................19
2-1-1 ATE接收機系統規格.....................................19
2-1-2 ATE 接收機系統區塊圖..................................20
2-1-3 ATE 發射機系統規格....................................20
2-1-4 ATE 發射機系統區塊圖..................................21
2-1-5 ATE 收發機零件選擇....................................22
2-1-6 ATE 收發機系統規劃....................................26
2-2 ATE 系統模擬- Budget Analysis..........................28
2-3 IP3、P1dB、NF等原理之介紹...............................29
2-3-1 P1dB之介紹...........................................29
2-3-2 IP3之介紹............................................31
2-3-3 Noise Figure雜訊指數.................................33
2-3-4 多級放大器串接所產生之P1dB、IP3、NF、Gain之公式表示......34
2-4 ADS Budget Analysis...................................35
2-4-1 ATE接收機最大可接收功率(P1dB)模擬......................36
2-4-2 ATE接收機最大可接收功率雜訊指數模擬.....................38
2-4-3 ATE接收機最大可接收功率模擬2(去掉中頻放大器).............38
2-4-4 ATE接收機最大可接收功率模擬2雜訊指數模擬.................39
2-4-5 ATE接收機靈敏度模擬(Sensitivity，最小可接收功率)模擬.....41
2-4-6 ATE接收機最小可接收功率雜訊指數模擬......................42
2-4-7 ATE接收機靈敏度模擬2(去掉中頻放大器).....................43
2-4-8 ATE 接收機靈敏度模擬2雜訊指數模擬(去掉中頻放大器).........44
第三章 ATE收發機區塊電路驗證系統整合...........................45
3-1 TRL....................................................49
3-1-1 TRL 治具的製作........................................49
3-1-2 TRL治具製作注意事項....................................50
3-1-3 TRL治具驗證...........................................53
3-2 ATE區塊電路驗證..........................................54
3-2-1 Switch...............................................54
3-2-2 LNA(Low Noise Amplifier).............................56
3-2-3 DA(Deriving Amplifier)...............................56
3-2-4 VGA(Variable Gain Amplifier).........................56
3-2-5 Filter...............................................62
3-2-6 MCU (Micro Control Unit).............................63
3-2-7 VCO..................................................63
3-2-8 Synthesizer..........................................65
3-2-9 PLL 迴路濾波器........................................69
3-2-10 FM Demodulator......................................80
3-2-11 Common Emitter Amplifier............................83
3-2-12 Comparator..........................................85
3-2-13 Digital Variable Gain Attenuators...................86
3-3 ATE無線通道的建立與驗證流程...............................89
3-4 ATE程式流程圖 ...........................................91
3-5 ATE PCB Layout.........................................92
3-5-1板層規劃與配置..........................................93
3-5-2 PCB Layout 注意事項...................................93
第四章 DUT收發機系統規劃......................................94
4-1 DUT系統規劃..............................................94
4-1-1 DUT接收機系統規格.......................................94
4-1-2 DUT 接收機系統區塊圖....................................95
4-1-3 DUT 發射機系統規格......................................95
4-1-4 DUT 發射機系統區塊圖....................................96
4-2 DUT系統模擬- Budget Analysis.............................96
4-2-1 ADS Budget Analysis...................................96
4-2-2-1 DUT接收機最大可接收功率(P1dB)模擬......................97
4-2-2-2 DUT接收機最大可接收功率雜訊指數模擬.....................98
第五章 DUT收發機區塊電路驗證系統整合 ............................99
5-1 DUT區塊電路驗證...........................................99
5-1-1 VCO....................................................99
5-1-2 Envelope Detect........................................99
5-2 DUT PCB Layout..........................................102
第六章 ATE與DUT收發機使用說明圖................................103
6-1 ATE 收發機使用說明圖......................................103
6-2 DUT 收發機使用說明圖......................................104
6-3 ATE 與DUT利用Switch Adapter供電電源接法...................105
6-3-1 7V 電源接法............................................105
6-3-2 5V 電源接法............................................106
第七章 HOY Version_3 機構組裝.................................107
第八章 結論與未來展望..........................................108

ATE MCU C語言程式附錄.........................................110
論文內容備註..................................................144
參考文獻......................................................145

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