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研究生:顏志坤
研究生(外文):Chih-Kun Yen
論文名稱:鎢/氮化鎢疊層閘極電極堆疊於氧化鉿閘極介電層之特性研究
論文名稱(外文):Characteristics of W/WNx bi-layer gate electrodes on HfOx gate dielectrics
指導教授:陳貞夙陳貞夙引用關係
指導教授(外文):Jen-Sue Chen
學位類別:碩士
校院名稱:國立成功大學
系所名稱:材料科學及工程學系碩博士班
學門:工程學門
學類:材料工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:96
語文別:中文
論文頁數:116
中文關鍵詞:雙層結構閘極電極氧化鉿
外文關鍵詞:gate electrodebilayer structureHafnium oxide
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  • 被引用被引用:2
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本研究使用氧化鉿(HfO2)蒸鍍源,利用電子束蒸鍍不同厚度之HfOx介電薄膜於矽晶片上,隨後使用金屬鎢(W)靶材,以磁控濺鍍法分別於Ar及Ar+N2的氣氛環境下,濺鍍金屬鎢(W)薄膜和氮化鎢(WNx)薄膜,以及W/WNx疊層結構作為閘極電極,形成金屬/介電層/半導體(MOS)電容結構,並分別在真空及氮氫氣氛下,進行500oC退火20分鐘,探討不同閘極電極結構於不同熱處理氣氛下之材料性質及電性表現,藉以評估其作為閘極電極層之可行性。此外,本研究中亦萃取出各條件閘極電極之有效功函數,探討閘極電極材料性質與功函數變化之間的關係。
本實驗利用掃描式電子顯微鏡及穿透式電子顯微鏡對HfOx介電薄膜進行厚度鑑定;使用X光光電子能量分析儀對初鍍及經過500oC氮氫退火後之HfOx介電薄膜進行化學鍵結型態分析及半定量分析;以拉塞福背向散射分析儀對WNx薄膜進行組成成份鑑定;利用低掠角X光繞射儀對MOS電容結構中之閘極電極進行薄膜晶體結構分析;使用X光光電子能量分析儀對MOS結構電容器進行縱深分析,觀察由薄膜表面至內部的化學組成及鍵結的變化;以穿透式電子顯微鏡觀察MOS結構電容器截面影像;利用歐傑電子能譜分析儀進行縱深分析,觀察MOS結構電容器各原子的分佈及擴散情形;MOS結構電容器之電容-電壓(C-V)曲線乃使用電感電容電阻計量儀(Agilent 4284)進行量測,並萃取出其有效功函數,而漏電流密度-電壓(J-V)曲線則以直流電壓源/微安培計量儀(Agilent 4140B)量得。
實驗結果顯示,藉由調整蒸鍍時間,可得到不同厚度之HfOx介電薄膜,而初鍍及經過500oC氮氫退火的HfOx介電薄膜,皆呈現相同之非計量比,且有氧空缺存在。於電性表現上,與初鍍之HfOx介電薄膜相比,經過氮氫退火後其氧化層捕捉電荷(Not)及固定氧化層電荷(Qf)數量皆上升,而經過真空退火後只有Qf之數量上升。此外,其Qf之極性型態於兩種退火後皆由正轉負,可能是由於金屬矽氧化物於退火期間產生所導致。
MOS結構電容器初製備時,不同閘極結構之功函數由於intrinsic Fermi-level pinning的緣故,皆約為4.85 eV。但不論是經過氮氫退火或真空退火後,功函數皆有下降的趨勢(4.09~4.32 eV),主要原因為extrinsic states而造成的Fermi-level pinning現象所導致。此外,由於退火後W薄膜與HfOx介電層於退火時發生反應,於兩者界面產生WOx,使得閘極電極為單層W之試片,其有效功函數較其他類型之閘極電極來得大(約為4.57 eV)。另外,插入WNx薄膜可提供阻障層之效果,避免介電層與閘極電極間相互擴散及反應。本研究發現,使用W(50nm)/WNx(15nm)疊層閘極電極經過熱處理前後,可達到PMOS及NMOS所需之功函數,且W薄膜與WNx薄膜可分別提供低電阻率及良好熱穩定性之優點。
Hafnium oxide (HfOx) gate dielectrics of various thicknesses are prepared on silicon wafers by E-beam evaporation using a HfO2 source. Tungsten (W), tungsten nitride (WNx) and W/WNx bi-layer gate electrodes are subsequently deposited by magnetron sputtering from W target to fabricate metal/oxide/semiconductor (MOS) capacitors. To establish the feasibility of applying W/WNx bi-layer as the gate electrodes, we investigate the material and electrical characteristics of MOS capacitors before and after 500oC annealing for 20 min, in both forming gas (FGA) and vacuum ambients. In addition, the effective work functions (Φm) of different types of gate electrodes are also extracted to discuss the relation between material characteristics and the shift of Φm.
The thicknesses of HfOx dielectrics are determined by scanning electron microscopy (SEM) and transmission electron microscopy (TEM). X-ray photoelectron spectroscopy (XPS) is applied for the composition and chemical bonding analysis of HfOx dielectrics before and after FGA. Rutherford backscattering spectrometry (RBS) is utilized to examine the composition of WNx thin film. The crystal structure of gate electrodes is identified by grazing incident angle x-ray diffractometer (GIAXRD). XPS depth profiling is applied to observe the variation of chemical bonding states within the gate electrodes. The microstructure of MOS capacitors is examianed from the TEM cross-sectional images. Auger electron spectroscopy (AES) is applied for elemental depth profiling. For electrical properties, C-V curves are obtained by using LCR meter (Agilent 4284) to extract the Φm and picoampere meter/DC voltage source (Agilent 4140B) is used to measure the J-V curves.
Based on SEM and TEM images, HfOx dielectrics of different thicknesses can be obtained by varying evaporation time. According to XPS spectra, HfOx dielectrics before and after FGA both possess oxygen vacancies and the similar non-stoichiometry value. Regarding to the electrical characteristics, the amounts of oxide trapped charge (Not) and fixed oxide charge (Qf) in HfOx dielectrics both increase after FGA, but only the quantity of Qf increases after vacuum annealing. Moreover, the type of Qf switches from positive to negative no matter which annealing is carried out, and it may be caused by the formation of hafnium silicate during annealing.
Due to intrinsic Fermi-level pinning, all gate electrodes of as-fabricated MOS capacitors display a similar Φm (about 4.85 eV). However, the values of Φm all decrease (4.09~4.32 eV) after FGA or vacuum annealing, arisen from the Fermi-level pinning of extrinsic states. Furthermore, the reaction between W and HfOx during annealing leads to the formation of WOx at the interface and results in a larger Φm (about 4.57 eV) for W single layer than other types of gate electrodes. Besides, the interposed WNx can be a barrier layer to prevent the inter-diffusion and inter-reaction between the W gate electrode and the dielectric. In this study, the required values of Φm for PMOS and NMOS devices can be obtained by using W(50nm)/WNx(15nm) bi-layer gate electrode before (4.85 eV) and after annealing (4.16 eV). At the same time, W and WNx can provide low resitivity and good thermal stability, respectively.
第1章 緒論...................................... 1
1-1 背景.................................... 1
1-2 研究目的................................ 4
第2章 理論基礎.................................. 5
2-1 金-氧-半場效電晶體(MOSFET).............. 5
2-2 金屬閘極電極取代多晶矽閘極電極之理由.... 6
2-3 金屬閘極電極之相關文獻探討.............. 11
2-4 Fermi level pinning現象及其相關文獻..... 14
2-5 鎢及氮化鎢之基本性質.................... 19
2-6 MOS電容器結構之氧化層缺陷............... 21
2-7 功函數之求法............................ 26
第3章 實驗方法與步驟............................ 29
3-1 實驗材料................................ 29
3-1.1 蒸鍍源(Evaporation Sources)........... 29
3-1.2 濺鍍靶材(Sputter Target).............. 29
3-1.3 基材(Substrates)...................... 29
3-1.4 濺鍍及退火使用氣氛(Gas Ambient)....... 29
3-1.5 實驗相關藥品與耗材.................... 30
3-2 實驗設備................................ 31
3-2.1 薄膜蒸鍍系統(Evaporation System)...... 31
3-2.2 薄膜濺鍍系統(Sputtering System)....... 32
3-2.3 熱處理系統(Thermal Treatment System).. 33
3-3 實驗流程................................ 35
3-3.1 基材清洗.............................. 35
3-3.2 HfOx介電薄膜製備...................... 35
3-3.3 MOS電容器製備......................... 36
3-3.4 MOS電容器熱處理....................... 36
3-4 分析儀器................................ 41
3-4.1 掃瞄式電子顯微鏡...................... 41
3-4.2 X光光電子能譜儀....................... 42
3-4.3 拉賽福背向散射分析儀.................. 43
3-4.4 低掠角X光繞射儀....................... 44
3-4.5 穿透式電子顯微鏡...................... 45
3-4.6 歐傑能譜分析儀........................ 46
3-4.7 電感電容電阻計量儀與微安培計量儀...... 47
第4章 實驗結果與討論............................ 49
4-1 HfOx介電薄膜厚度鑑定.................... 49
4-2 HfOx介電薄膜成份及化學鍵結鑑定.......... 53
4-2.1 HfOx介電薄膜之化學鍵結鑑定............ 53
4-2.2 HfOx介電薄膜成份鑑定.................. 58
4-3 WNx薄膜成份鑑定......................... 61
4-4 W/WNx疊層結構之材料特性分析............. 65
4-4.1 薄膜晶體結構分析...................... 65
4-4.2 XPS縱深分析........................... 72
4-4.3 高解析穿透式電子顯微鏡分析............ 76
4-4.4 歐傑電子縱深能譜分析.................. 82
4-5 W/WNx/HfOx/n-Si電容器之電性量測分析..... 87
4-5.1 C-V量測及功函數量測................... 88
4-5.2 I-V量測............................... 101
第5章 結論...................................... 106
第6章 參考文獻.................................. 107
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