|
[1] F. Goodenough, “Low Dropout Linear Regulators,” Electronic Design, pp. 65-77, May 13, 1996.
[2] Robert W. Erickson and Dragan Maksimovic, Fundamentals of Power Electronics, 2nd ed., Norwell, MA: Kluwer Academic Publishers, 2001
[3] K. Sawada, Y. Sugawara, and S. Masui, “An on-chip high-voltage generator circuit for EEPROM’s with a power supply voltage below 2V,” in Symp. VLSI Circuits Dig. Tech. Papers, 1995, pp. 75-76. [4] T. Kawahara, T. Kobayashi, Y. Jyouno, S. Saeki, N. Miyamoto, T. Adachi, M. Kato, A. Sato, J. Yugami, H. Kume, and K. Kimura, “Bitline clamped sensing multiplex and accurate high voltage generator forquarter-micron flash memories,” IEEE J. Solid-State Circuits, vol. 31, pp. 1590–1600, Nov. 1996 [5] Y. Nakagome, et al., ”An experimental 1.5-V 64 Mb DRAM,” IEEE J. Solid-State Circuits, vol. 26, pp. 465-472, April 1991. [6] M. M. Ahmadi and G. Jullien, “A full CMOS voltage regulating circuit for bioimplantable applications,” in Midwest Symp. Circuits Syst., 2005, vol. 2, pp. 988-991. [7] Dickson, J. “On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique.” IEEE Journal of Solid-State Circuits, Vol. 11, No 6, pp. 374-378, June 1976. [8] T. Tanzawa and T. Tanaka, “A dynamic analysis of the Dickson charge pump circuit,” IEEE J. Solid-State Circuits, vol. 32, pp. 1231-1240, Aug. 1997. [9] A. Cabrini, L. Gobbi, and G. Torelli, “Theoretical and experimental analysis of Dickson charge pump output resistance,” in Proc. IEEE Int. Symp. Circuits Syst., 2006, pp. 2749-2752. [10] Jongshin Shin, et al., “A new charge pump without degradation in threshold voltage due to body effect [memory applications],” IEEE J. Solid-State Circuits, vol. 35, pp. 1227-1230, Aug. 2000. [11] A. Umezawa, et al., “A 5-V-only operation 0.6-�慆 flash EEPROM with row decoder scheme in triple-well structure,” IEEE J. Solid-State Circuits, vol. 27, pp. 1540-1545, Nov. 1992. [12] L. Mensi, et al., “A new integrated charge pump architecture using dynamic biasing of pass transistors,” in Proc. European Solid-State Circuits Conf., 2005, pp. 85-88. [13] C. Lauterbach, W. Weber, and D. Romer, “Charge sharing concept and new clocking scheme for power efficiency and electromagnetic emission improvement of boosted charge pumps,” IEEE J. Solid-State Circuits, vol. 35, pp. 719-723, May 2000. [14] Lin, H., N. Chen, and J. Lu. “Design of modified four-phase CMOS charge pumps for low-voltage flash memories.” Journal of Circuits, System, and Computers, Vol. 11, No. 4, pp.393-403,2002. [15] Pan, et al. “Four phase charge pump operable without phase overlap with improved efficiency.” U.S. patent 7,030,683. [16] Wu, J. T. and L. K. Chang. “MOS charge pumps for low-voltage operation.” IEEE Journal of Solid-State Circuits, Vol. 33, No. 4, April 1998 [17] Tsang, B. and E. Ng. “Switched capacitor DC-DC converters: Topologies and applications.” www.ocf.berkeley.edu/~eng/classes/EE290cPresentation.ppt. [18] Wu, J. T. and Chang, K. L. “Low supply voltage CMOS charge pumps,” www.ics.ee.nctu.edu.tw/~jtwu/publications/pdf/97vlsi-cp.pdf. [19] M. M. Ahmadi and G. Jullien, “A new CMOS charge pump for low voltage applications,” in IEEE Int. Symp. Circuits Syst., 2005, vol. 5, pp. 4261-4264. [20] Lon-Kou Chang and Chih-Huei Hu, “High efficiency MOS charge pumps based on exponential-gain structure with pumping gain increase circuits,” IEEE Tran. Power Electronics, vol. 21, pp. 826-831, May 2006. [21] Ming-Dou Ker, Shih-Lun Chen, and Chia-Shen Tsai, “Design of charge pump circuit with consideration of gate-oxide reliability in low-voltage CMOS processes,” IEEE J. Solid-State Circuits, vol. 41, pp. 1100-1107, May 2006. [22] Khoman Phang and D. A. Johns, “A 1V 1mW CMOS Front-End with on-chip Dynamic Gate Biasing for a 75Mb/s Optical Receiver,” IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, pp. 218-219, Feb. 2001. [23] Y. Moisiadis, I. Bouras, and A. Arapoyanni, “A CMOS charge pump for low voltage operation,” Proc. IEEE Int. Symp. Circuits Syst., 2000, vol. 5, pp. 577-580. [24] Hoi Lee and P. K. T. Mok, “Switching noise and shoot-through current reduction techniques for switched-capacitor voltage doubler,” IEEE J. Solid-State Circuits, vol. 40, pp. 1136-1146, May 2005. [25] TianRui Ying, Wing-Hung Ki, and Mansun Chan, “Area-efficient CMOS charge pumps for LCD drivers,” IEEE J. Solid-State Circuits, vol. 38, pp. 1721-1725, Oct. 2003. [26] Kyeong-Sik Min, et al., “CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits,” IEEE Int. Symp. Circuits Syst., 2002, vol. 5, pp. V-545 - V-548. [27] Lin, H., H. K. Chang, and C. S. Wong. “Novel high positive and negative pumping circuits for low supply voltage.” IEEE International Symposium on Circuits and Systems, Vol. 1, pp. 238-241, May 20-June 2, 1999. [28] Naso, et al. “Negative-voltage charge pump with feedback control.” U.S. Patent 5,168,174.
[29] Jinbo, T., et al. “A 5-V-only 16-Mb flash memory with sector erase mode.” IEEE Journal of Solid-State Circuits, Vol. 27, pp. 1547-1553, 1992. [30] Atsumi, S., et al. “A 16-Mb Flash EEPROM with a new self-data-refresh sheme for a sector erase operation.” IEEE Journal of Solid-State Circuits, Vol. 29, pp. 461-469, 1994 [31] Y. E. Tsiatouhas, “A stress-relaxed negative voltage-level converter,” IEEE J. Transactions on Ckts. & Sys, vol 54, no. 3, March 2007 [32] A. M. Abo and P. R. Gray, “A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter,” IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599–606, May 1999. [33] T. Ying, W. H. Ki, and M. Chan, “Area-efficient CMOS charge pumps for LCD drivers,” IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1721–1725, Oct. 2003. [34] W. H. Ki, F. Su and C. Y. Tsui, “Charge redistribution loss consideration in optimal charge pump design,” IEEE Int’l Symp. On Ckts. & Sys., Kobe, Japan, pp. 1895-1898, May 2005. [35] F. Su, W. H. Ki, and C. Y. Tsui, “High efficiency cross-coupled doubler with no reversion loss,” IEEE Int’l Symp. On Ckts. & Sys., May 2006. [36] Christian Falconi, Giancarlo Savone and Arnaldo D’Amico, “Hifg Light-Load Efficiency Charge Pumps,” IEEE Int’l Symp. On Ckts. & Sys., Vol. 2, pp. 1887-1890, May 2005. [37] Alan Hastings, “The Art of Analog Layout,” 2nd ed, Prentice Hall, 2001. [38] Yi-Pai Huang, Ke-Horng Chen, Chun-Ho Chen, Fang-Cheng Lin, and Han-Ping D. Shieh, “Adaptive LC/BL Feedback Control in Field Sequential Color LCD Technique for Color Breakup Minimization,” IEEE/OSA Journal of Display Technology, 2008. [39] Chun-Ho Chen, Ke-Horng Chen, Che-Chin Chen, Yi-Fu Chen, and Han-Ping Shieh, “AMOLED Panel Driven by Time-Multiplexing Clamped Inverter Circuits to Reduce Complex Control Signals,” in Journal of the Society for Information Display, 2008. [40] Ke-Horng Chen, Chia-Jung Chang, and Ter-Hsing Liu, “Bidirectional Current-Mode Capacitor Multipliers for On-Chip Compensation,” in IEEE Transaction on Power Electronics, pp. 180-188, Jan. 2008. [41] Yi-Fu Chen, Che-Chin Chen, and Ke-Horng Chen, “Mixed Color Sequential Technique for Reducing Color Breakup and Motion Blur Effects,” IEEE/OSA Journal of Display Technology, pp. 377-385, Dec. 2007. [42] Hong-Wei Huang, Ke-Horng Chen, and Sy-Yen Kuo, “Dithering Skip Modulation, Width and Dead Time Controllers in Highly Efficient DC-DC Converters for System-on-chip Applications,” in IEEE Journal of Solid-State Circuits, pp. 2451-2465, Nov. 2007. [43] Ke-Horng Chen, Hong-Wei Huang, and Sy-Yen Kuo, “Fast Transient DC-DC Converter with On-Chip Compensated Error Amplifier,” in IEEE Transactions on Circuits and Systems II, pp. 1150-1154, Dec. 2007. [44] Ke-Horng Chen, Chieh-Ching Chien, Ching-Hsun Hsu, and Li-Ren Huang “Optimum Power-Saving Method for Power MOSFET Width of DC-DC Converters,” in IET Proceedings Circuits, Devices & Systems, Volume 1, Issue 1, pp. 57-62, Feb. 2007. [45] K.-H. Chen, C.-S. Wang, and S.-Y. Kuo, “A New BiCMOS Increased Full-Swing Converter for Low-Internal-Voltage ULSI Systems,” IEEE Trans. on Circuits and Systems (I) Fundamental Theory and Applications., vol. 47, pp. 1238-1243, Aug. 2000. [46] Shih-Yi Yuan, Ke-Horng Chen, Jing-Yang Jou, and Sy-Yen Kuo, "Static Power Analysis for Power-Driven Synthesis," in IEE Proceedings Computer and Digital Technique, VOL. 145, No. 2, March 1998, pp. 89-95. [47] Hsin-Hsin Ho and Ke-Horng Chen, “A predictive Dynamic Droop Technique for Current Balance in Parallel Power Supplies,”電子月刊第十二卷第十一期, 2006 [48] Chun-Yu Hsieh and Ke-Horng Chen, “Boost DC-DC Converter with Charge-Recycling (CR) and Fast Reference Tracking (FRT) Techniques for High-Efficiency and Low-Cost Led Driver,” the 34th European Solid-State Circuits Conference (ESSCIRC), Sep. 2008. [49] Hong-Wei Huang, Chia-Hsiang Lin, and Ke-Horng Chen, “Low-Dropout Regulators with Adaptive Reference Control and Dynamic Push-Pull Techniques for Enhancing Transient Performance,” the 34th European Solid-State Circuits Conference (ESSCIRC), Sep. 2008. [50] Chi-Lin Chen, Wei-Jen Lai, Wei-Lun Hsieh, and Ke-Horng Chen, “A New PWM/PFM Control Technique for Improving Efficiency Over Wide Load Range,” the 15th IEEE International Conference on Electronics, Circuits and Systems, Sep., 2008. [51] Chia-Hsiang Lin and Ke-Horng Chen, “Fast Charging Technique for Li-Ion Battery Charger,” the 15th IEEE International Conference on Electronics, Circuits and Systems, Sep., 2008. [52] Chi-Lin Chen, Wei-Jen Lai, Wei-Lun Hsieh, and Ke-Horng Chen, “A High-Speed and Precise Current Sensing Circuit with Bulk Control (CCB) Technique,” the 15th IEEE International Conference on Electronics, Circuits and Systems, Sep., 2008. [53] Yean-Kuo Luo, Ke-Horng Chen, and Wei-Chou Hsu, “A Dual-Phase Charge Pump Regulator with Nano-Ampere Switched-Capacitor CMOS Voltage Reference for Achieving Low Output Ripples,” the 15th IEEE International Conference on Electronics, Circuits and Systems, Sep., 2008. [54] Chi-Lin Chen, Wei-Lun Hsieh, Han-Hsiang Huang, and Ke-Horng Chen, “Fast Mode-Switching Technique in Hrbrid-Mode Operation,” 51th IEEE Int'l Midwest Symposium on Circuits & Systems, Aug. 2008. [55] Huan-JenYang, Han-Hsiang Huang, Chi-Lin Chen, Ming-Hsin Huang, and Ke-Horng Chen, “Current Feedback Compensation (CFC) Technique for Adaptively Adjusting the Phase Margin in Capacitor-Free LDO Regulators,” 51th IEEE Int'l Midwest Symposium on Circuits & Systems, Aug. 2008. [56] Ming-Hsin Huang, Ke-Horng Chen, and Wei-Hsin Wei “Single-Inductor Dual-Output DC-DC Converters with High Light-Load Efficiency and Minimized Cross-Regulation for Portable Devices,” IEEE VLSI-Symposium on Technology and Circuits, June, 2008. [57] Chia-Lin Chiu and Ke-Horng Chen, “A High Accuracy Current-Balanced Control Method for LED Backlight,” PESC 2008, June, 2008. [58] Hsin-Hsin Ho, Pin-Chin Huang, Wei-Quan Wu, and Ke-Horng Chen, “Ratio Buck-Boost (RBB) Converter with Feed-Forward Technique for Achieving Fast Line Response,” PESC 2008, June, 2008. [59] Chun-Yu Hsieh, Ke-Horng Chen, and Ming-Tsung Ho, “High Efficiency and/or Low Cost LED Backlight System for Color Sequential Technique in Color Filter-less LCD System,” SID 2008, May. 2008. [60] Chun-Ho Chen, Ke-Horng Chen, Ming-Tsung Ho, Yi-Pai Huang, and Han-Ping D. Shieh, “Gray Level Redistribution in Field Sequential Color LCD Technique for Color Breakup Reduction,” SID 2008, May. 2008. [61] Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, and Ke-Horng Chen, “Current Mode DC-DC Buck Converters with Optimal Fast-Transient Control,” ISCAS, May. 2008. [62] Hong-Wei Huang, Chia-Hsiang Lin, and Ke-Horng Chen, “A Programmable Dual Hysteretic Window Comparator,” ISCAS, May. 2008. [63] Chun-Yu Hsieh, Shih-Jung Wang, Yu-Huei Lee, and Ke-Horng Chen, “LED Drivers with PPD Compensation for Achieving Fast Transient Response,” ISCAS, May. 2008. [64] Chi-Lin Chen, Wei-Jen Lai, Ter-Hsing Liu, and Ke-Horng Chen, “Zero Current Detection Technique for Fast Transient Response in Buck DC-DC Converters,” ISCAS, May. 2008. [65] Hong-Wei Huang, Wei-Lun Hsieh, and Ke-Horng Chen, “Programmable Voltage-to-Current Converter with Linear Voltage Control Resistor,” ISCAS, May. 2008. [66] Hong-Wei Huang, Chun-Yu Hsieh, Ke-Horng Chen, and Sy-Yen Kuo, “A 1-V, 16.9 ppm/ °C, 250 nA Switched-Capacitor CMOS Voltage Reference,” IEEE ISSCC, Feb. 2008. [67] Chun-Yu Hsieh, Yung-Chun Chuang and Ke-Horng Chen, “A Novel Precise Step-Shaped Soft-Start Technique for Integrated DC-DC Converter,” the 14th IEEE International Conference on Electronics, Circuits and Systems, pp. 771-774, Dec., 2007. [68] Chun-Yu Hsieh, Po-Chin Fan and Ke-Horng Chen, “A Dual Phase Charge Pump with Compact Size,” the 14th IEEE International Conference on Electronics, Circuits and Systems, pp.202-205, Dec., 2007. [69] Hong-Wei Huang, Chun-Yu Hsieh, Ke-Horng Chen, and Sy-Yen Kuo, “Adaptive Frequency Control Technique for Enhancing Transient Performance of DC-DC Converters,” the 33rd European Solid-State Circuits Conference (ESSCIRC), pp. 174-177, Sep. 2007. [70] Ming-Hsin Huang, Hong-Wei Huang, Jiun-Yan Peng, Tzung-Ling Tsai, Min-Chin Lee, Ching-Sung Wang, and Ke-Horng Chen, “Single-Inductor Dual-Output (SIDO) DC-DC Converters for Minimized Cross Regulation and High Efficiency in Soc Supplying Systems,” 50th IEEE Int'l Midwest Symposium on Circuits & Systems/5th IEEE Int'l Northeast Workshop on Circuits & Systems, pp. 550-553, Aug. 2007. [71] Shih-Min Chen, Chun-Yu Hsieh, and Ke-Horng Chen, “Challenge on Compact Size DC-DC Buck Converters with High Speed Current Sensor and on-Chip Inductors,” 50th IEEE Int'l Midwest Symposium on Circuits & Systems/5th IEEE Int'l Northeast Workshop on Circuits & Systems, pp. 670-673, Aug. 2007. [72] Yung-Hsin Lin, Kuo-Lin Zheng, and Ke-Horng Chen, “Power MOSFET Array for Smooth Pole Tracking in LDO Regulator Compensation,” 50th IEEE Int'l Midwest Symposium on Circuits & Systems/5th IEEE Int'l Northeast Workshop on Circuits & Systems, pp. 554-557, Aug. 2007. [73] Hong-Wei Huang, Chun-Yu Hsieh, Ke-Horng Chen, and Sy-Yen Kuo, “Load dependent Dead Time Controller Based on Minimized Duty cycle technique in DC-DC Buck Converters,” 38th IEEE Power Electronics Specialists Conference-2007, pp. 2037-2041, June, 2007. [74] Hsin-Hsin Ho and Ke-Horng Chen, “Improving Current Sharing Performance by Dynamic Droop Scaling Technique in Multiple Supplying Systems,” 38th IEEE Power Electronics Specialists Conference-2007, pp.189-193, June, 2007. [75] Yi-Fu Chen, Che-Chin Chen, and Ke-Horng Chen, “Mixed Color Sequential Technique for High Contrast LCD with Optimum Power Consumption,” SID 2007, pp. 134-137, May. 2007. [76] Che-Chin Chen, Yi-Fu Chen, Ti-Ti Liu, Chun-Ho Chen, Ming-Tsung Ho, Ke-Horng Chen, and Han-Ping, Shieh, “Spatial-temporal Division in Field Sequential Color Technique for Color Filterless LCD,” SID 2007, pp. 1806-1809, May. 2007. [77] Hsin-Hsin Ho and Ke-Horng Chen, “Dynamic Droop Scaling for Improving Current Sharing Performance in a System with Multiple Supplies,” ISCAS, pp. 545-548, May. 2007. [78] Huan-JenYang and Ke-Horng Chen “Feed-Forward Pulse Width Modulation for High Line Regulation Buck or Boost Converters,” ISCAS, pp.785-788, May. 2007. [79] Hong-Wei Huang, Hsin-Hsin Ho, Chieh-Ching Chien, Ke-Horng Chen, Gin-Kou Ma, and Sy-Yen Kuo, “Fast Transient DC-DC Converter with On-Chip Compensated Error Amplifier,” the 32nd European Solid-State Circuits Conference (ESSCIRC), pp. 324-327, Sep. 2006. [80] Hong-Wei Huang, Hsin-Hsin Ho, Chieh-Ching Chien, Ke-Horng Chen, Gin-Kou Ma, and Sy-Yen Kuo, “Dithering Skip Modulator with a Width Controller for Ultra-wide-load High-Efficiency DC-DC Converters,” 2006 IEEE Custom Integrated Circuits Conference (CICC), Sep. 10-13, 2006. [81] Hong-Wei Huang, Hsin-Hsin Ho, Ke-Horng Chen, and Sy-Yen Kuo, “Dithering Skip Modulator with a Novel Load Sensor for Ultra-wide-load High-Efficiency DC-DC Converters,” International Symposium on Low Power Electronics and Design – 2006, pp. 388-393, Oct. 2006.
[82] Ke-Horng Chen, Chieh-Ching Chien, and Li-Ren Huang, “Optimum Power-Saving Method for Power MOSFET Width of One-Cycle Control DC-DC Converters,” 37th IEEE Power Electronics Specialists Conference-2006, June 18-22, 2006. [83] Hong-Wei Huang, Ke-Horng Chen, and Sy-Yen Kuo, “Highly Efficient Tri-Mode Control of Buck Converters,” 37th IEEE Power Electronics Specialists Conference -2006, June 18-22, 2006. [84] Hong-Wei Huang, Hsin-Hsin Ho, Ke-Horng Chen, and Sy-Yen Kuo, “On-Chip Compensated Error Amplifier for Fast Transient DC-DC Converters,” Sixth IEEE International Conference on Electro/Information Technology- 2006, pp. 103-108, May, 2006. [85] Hung-Chi Lee, Kuo-Tai Chang, Ke-Horng Chen, and Wen Tsao Chen, “Power saving of a dynamic width controller for a monolithic current-mode CMOS DC-DC converter,” System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on, pp. 352-357, June 2005. [86] Chia-Jung Chang and Ke-Horng Chen, “Bidirectional current-mode capacitor multiplier in DC-DC converter compensation,” System-on-Chip for Real-Time Applications, 2005. Proceedings Fifth International Workshop on, pp. 111-116, June 2005. [87] Ke-Horng Chen, “Extend the Battery Life by Highly Efficient DC-DC Converters,” Proceedings of 2004 Taipei Internal Power Forum, Dec. 2004. [88] C. S. Wang, S. Y. Yuan, K. H. Chen, and S. Y. Kuo, “A New BiCMOS Increased Full-Swing Converter for Low-Internal-Voltage ULSI Systems,” Proceeding on IEEE International Symposium Circuits and Systems, pp. 1856-1859, June 1997. [89] Yung-Chun Chuang and Ke-Horng Chen, “A Novel Precise Step-Shaped Soft-Start Technique for Integrated DC-DC Converter,” 18th VLSI Design/CAD Symposium, August, 2007. [90] Po-Chin Fan and Ke-Horng Chen, “A Dual Phase Charge Pump with Compact Size,” 18th VLSI Design/CAD Symposium, August, 2007. [91] J. C. Chiou, C. C. Su, H. C. Hong, Y. Chiu, K. H. Chen, Y. J. Lin, L. J. Shieh and K. C. Hou, “The Design And Fabrication Of An Ultra Low Power Micro-Sensing Module For Wireless Sensor Networks,” 18th VLSI Design/CAD Symposium, August, 2006. [92] Ke-Horng Chen, Shih-Yi Yuan, Jing-Yang Jou, and Sy-Yen Kuo: ‘Cell-Based Power Estimation for CMOS Combinational Circuits Using a Logic Simulator,’ Proceedings of the7th VLSI Design/CAD Symposium Proceedings, Aug. 1996, pp.81-84.
|