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研究生:陳建豪
研究生(外文):Jian-Hao Chen
論文名稱:應用高介電常數絕緣層與矽奈米微晶粒於超大型積體電路元件之研究
論文名稱(外文):A Study of High-k Dielectrics and Si Nano-crystals for ULSI Devices
指導教授:雷添福趙天生
指導教授(外文):Tan-Fu LeiTien-Sheng Chao
學位類別:博士
校院名稱:國立交通大學
系所名稱:電子工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2007
畢業學年度:96
語文別:英文
論文頁數:170
中文關鍵詞:高介電常數矽奈米微晶粒鈷鈦酸氮摻雜矽酸鉿非揮發性記憶體
外文關鍵詞:High-kSi Nano-crystalCoTiO3Nitrogen incorporationHafnium silicatenonvolatile memory
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本論文首先對於高介電常數鈷鈦酸(CoTiO3)絕緣層穩定性的改善,提出三種摻雜氮的方法。利用氮氣分子(N2+)或原子(N+)離子,以低能量植入鈷鈦金屬堆疊之中,接著進行氧化,利用電子顯微鏡與X光繞射(X-Ray Diffraction)方法均觀察到結晶狀態被氮摻雜抑制,電性量測亦證明了可以降低漏電,提高崩潰電壓,並在電壓加壓下有較佳穩定性。或利用一氧化二氮(N2O)之電漿進行氮摻雜,先以較低的氧化溫度形成鈷鈦酸氧化物,接著進行一氧化二氮電漿處理,之後再經一道高溫熱退火步驟。我們發現以此方法可以有效改善鈷鈦酸絕緣層的熱穩定性,同時提升絕緣層的電性可靠度,絕緣層漏電可以降低大約4個數量級,而其崩潰電壓也可提高約2 V。
本論文接著利用兩種新穎的矽前驅物(precursor)以金屬有機氣相沉積法製備高介電常數鉿的矽酸鹽。兩種矽前驅物分別是叔丁基二甲基矽醇(tert-butyldimethyl silanol),與三叔戊氧基矽醇(tris(tert-pentoxy) silanol)。此論文研究的兩種矽前驅物在常溫常壓下為液態,因此可以提供足夠的蒸氣壓。兩種前驅物中,實驗發現三叔戊氧基矽醇此前驅物不需要氧氣介入反應即可生成矽酸鉿薄膜,而且可以在250 �aC的低溫下生成平坦的矽酸鉿絕緣層。在此研究中,我們使用一組具備臨場(in situ)製程能力的高真空系統,沉積過程中利用臨場橢圓儀(Ellipsometer)觀察絕緣層成長,探討其成長機制,並利用臨場熱退火與電子能譜儀(XPS)研究薄膜材料特性。其後製作電容元件探討絕緣層之電特性,將薄膜結構變化與電特性比較。此絕緣層被製作成電容探討其電特性,在氫氮混和氣體下(4 % H2 + 96 % N2)經過450 �aC退火,絕緣層介面特性獲得良好的改善。
利用臨場製程系統,本論文接著研究矽奈米微晶粒的製備。使用電子束蒸鍍法可在薄氧化層上沉積均勻且平坦的超薄(0.9�{3.5 nm)非晶矽層。隨後在未破壞真空的條件下進行臨場快速熱退火(850 �aC, 5min),可以形成自組裝半球狀矽奈米微晶粒。原子力顯微鏡,電子顯微鏡與電子能譜儀被使用於觀察晶粒結構。在較低溫度下(750 �aC)可以觀察到未完成的奈米點聚合現象。奈米晶粒先在非晶矽表面成核,接著聚合成較大的晶粒並消耗周圍的非晶矽層,直到其底部與二氧化矽基底層接觸。較薄的非晶矽層可形成較小且較密的晶粒。此研究中得到最小的晶粒半徑約是5.1 nm,同時亦得到最高的晶粒密度3.9×1011 cm-2。本論文亦利用臨場電子能譜觀測方法建立一套模型,以信號的強度估計矽奈米微晶粒的尺寸與密度,與實驗結果比較下,驗證出此方法十分具有實用性。
最後我們將此種新穎的半球狀矽奈米微晶粒製作成記憶體元件。製作矽奈米微晶粒於4nm之穿隧氧化層上,再覆蓋以17 nm之阻擋氧化層,製作完成之電容元件觀察到高的電荷儲存密度4.1�e1012 cm-2 (電子+電洞)。將此矽奈米晶粒製作成非揮發性記憶體元件可得到良好的記憶體特性。在�b10 V,0.02/0.1 s的閘極操作電壓下,可以得到約0.9 V之臨限電壓變化,在讀寫操作10000次之後亦保持住同樣的電壓記憶窗(memory window)。在�b15 V的操作下則可以得到約2.8 V的臨限電壓變化量,驗證此矽奈米微晶粒在記憶元件上之實用性。實驗證明這種真空聚合法形成之矽奈米晶粒可應用於非揮發記憶體的製作。
In this dissertation, three approaches to incorporating nitrogen in CoTiO3 high-�� dielectric films, including the ion implantation of N2+, ion implantation of N+, and N2O plasma treatment, have been investigated. Nitrogen incorporation by ion implantation of N2+ can improve the electrical properties in terms of gate leakage, breakdown voltage and time-to-breakdown (TBD). To reduce the impinging mass of implanted ion species, N+ ion implantation has been used. The same trends can be found as those produced using N2+. A N2O plasma treatment is also an excellent method to improve the electrical properties, exhibiting better-behaved C-V curves, lower gate leakage currents and higher breakdown voltages.
Two silanol precursors, tert-butyldimethyl silanol (BDMS) and tris(tert-pentoxy) silanol (TPOS), are evaluated as silicon precursors for hafnium silicate deposition with tetrakis-(diethylamido) hafnium (TDEAH). BDMS has one OH group, which should react with chemisorbed TDEAH. However, the other t-butyl and methyl groups can passivate the substrate surface, and stop the further absorption of TDEAH. Carbon-free hafnium silicate thin-films are deposited by MOCVD using alternative pulses of TDEAH and TPOS precursors. Hafnium silicates with high silicon contents (Hf1-xSixO2, x >0.5) are deposited at 250 �aC without additional oxidants. MOS capacitors are fabricated for electrical characterizations. A forming gas anneal can improve the hafnium silicate interface quality. This low-temperature process could be promising for TFT or optoelectronic applications.
Hemispherical Si nanocrystals are self-assembled using an in-situ thermal agglomeration technique. Ultrathin (0.9–3.5 nm) a-Si films are deposited on a 4-nm tunnel-oxide layer using electron-beam evaporation. An in-situ annealing can then activate the thermal agglomeration of Si and transform the ultrathin a-Si films into Si nanocrystals. The Si agglomeration process is evaluated with various processing parameters such as annealing temperatures, surface oxide conditions, and initial Si film thickness. Also, it is demonstrated that XPS measurements can effectively provide the information of the nanocrystal agglomeration. Calculations are made based on the photoelectron attenuation theories, and a simple model is proposed. Comparisons between the calculated results and the experimental data have shown a fairly good match.
The fabrication of a Si nanocrystal-embedded nonvolatile memory has been demonstrated using a thermal agglomeration technique. MOS capacitors and MOSFETs embedded with hemispherical Si nanocrystals are fabricated and characterized. A stored charge density of 4.1�e1012 cm-2 (electron + hole) is obtained with a highest nanocrystal density of 3.9�e1011 cm-2. Uniform FN tunneling is used to program and erase the Si nanocrystal floating-gate n-MOSFETs. A Vt window of 0.9 V is achieved under P/E voltages of �b10 V for 0.02/0.1 s. The memory device also shows good endurance and charge retention behaviors after 10000 P/E cycles. Increasing P/E voltages to �b15 V creates a large memory window (>2.7 V) with the proposed memory device. After a retention test for 100 hours, a memory window of 1 V is maintained. The retention characteristics have shown little temperature dependence with the Si nanocrystal memories, indicating that the charge-loss process is determined by the direct tunneling from nanocrystals into the oxide/Si-substrate interface states.
Abstract (Chinese)………………………………………………………i
Abstract (English)……………………………………………………...iii
Acknowledgement (Chinese)…………………………………………...v
Contents…………………………………………………………………vi
Table Captions………………………………………………………….ix
Figure Captions………………………………………………………….x
Chapter 1 Introduction ..........................................................................1
1.1 General Background..........................................................................................1
1.2 Motivation...........................................................................................................4
1.3 Organization of the Thesis ................................................................................7
Chapter 2 Experimental Techniques ..................................................12
2.1 Ultrahigh Vacuum in-situ Processing (ISP) System......................................12
2.2 Metal Organic Chemical Vapor Deposition (MOCVD) ...............................12
2.3 Material Characterization Techniques..........................................................13
2.3.1 X-ray Photoelectron Spectroscopy (XPS)...............................................13
2.3.2 High Resolution Transmission Electron Microscopy (HRTEM) .........14
Chapter 3 Performance Improvement of CoTiO3 High-κ Dielectrics
with Nitrogen Incorporation ................................................19
3.1 Introduction......................................................................................................19
3.2 Experimental ....................................................................................................21
3.3 Results and Discussion.....................................................................................22
3.4 Summary...........................................................................................................26
Chapter 4 Characterization of Hafnium Silicates by Pulse-Mode
MOCVD using [(C2H5)2N]4Hf and (C4H9)(CH3)2SiOH or
[(C5H11)O]3SiOH for Advanced High-κ Gate Dielectrics ..41
4.1 Introduction......................................................................................................41
4.2 Experimental ....................................................................................................45
4.2.1 MOCVD Hf Silicates using TDEAH and BDMS with O2 .....................45
4.2.2 Low-Temperature MOCVD Hf Silicates using TDEAH and TPOS....47
4.3 Results and Discussion.....................................................................................48
4.3.1 MOCVD Hf Silicates using TDEAH and BDMS with O2 .....................48
4.3.2 Low-Temperature MOCVD Hf Silicates using TDEAH and TPOS....51
4.4 Summary...........................................................................................................53
Chapter 5 Physical Characterization of Si Nanocrystals
Self-assembled by in-situ Rapid Thermal Annealing of
Ultrathin a-Si on SiO2 ...........................................................66
5.1 Introduction......................................................................................................66
5.2 Experimental ....................................................................................................68
5.3 Results and Discussion.....................................................................................71
5.3.1 in-situ XPS Investigation of the Si-Nanocrystal Self-Assembly............72
5.3.2 Effects of the Annealing Temperature on the Silicon Agglomeration
and Nanocrystal Formation ..................................................................75
5.3.3 Effects of the Native Oxide Growth on the Silicon Agglomeration and
Nanocrystal Formation..........................................................................79
5.3.4 Dependence of Nanocrystal Sizes and Densities on the Initial a-Si
Thickness ................................................................................................83
5.3.5 Estimation of the Si-Nanocrystal Size and Density by in-situ XPS Analysis ...................................................................................................85
5.4 Summary...........................................................................................................90
Chapter 6 Electrical Characteristics of Nonvolatile Memory Devices
with Embedded Hemispherical Si Nanocrystals ..............122
6.1 Introduction....................................................................................................122
6.2 Experimental ..................................................................................................124
6.2.1 Si-Nanocrystal Embedded MOS Capacitors........................................124
6.2.2 Si-Nanocrystal Embedded MOSFETs...................................................125
6.3 Results and Discussion...................................................................................126
6.3.1 Si-Nanocrystal Embedded MOS Capacitors........................................126
6.3.2 Si-Nanocrystal Embedded MOSFETs...................................................129
6.4 Summary.........................................................................................................133
Chapter 7 Conclusions and Recommendations for Future Work....147
7.1 Conclusions.....................................................................................................147
7.2 Recommendations for Future Work.............................................................151
References List ......................................................................................155
Curriculum Vitae ..................................................................................168
Publication List .....................................................................................169
[1] G. E. Moore, "Cramming More Components onto Integrated Circuits,"
Electronics, vol. 38, no. 8, pp. 114-117, 1965.
[2] B. G. Streetman and S. Banergee, Solid State Electronics Devices: Prentice
Hall, 2000.
[3] International Technology Roadmap for Semiconductors 2005 Edition. San
Jose, CA, USA: Semiconductor Industry Association, 2005.
(http://www.itrs.net/).
[4] T. Sakurai, "Perspectives on power-aware electronics," in Solid-State Circuits
Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE
International, 2003, pp. 26-29 vol.1.
[5] B. Brar, G. D. Wilk, and A. C. Seabaugh, "Direct extraction of the electron
tunneling effective mass in ultrathin SiO2," Appl. Phys. Lett., vol. 69, no. 18,
pp. 2728-2730, 1996.
[6] G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-κ gate dielectrics:
Current status and materials properties considerations," J. Appl. Phys., vol. 89,
no. 10, pp. 5243-5275, 2001.
[7] M. L. Green, E. P. Gusev, R. Degraeve, and E. L. Garfunkel, "Ultrathin (<4
nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics:
Understanding the processing, structure, and physical and electrical limits," J.
Appl. Phys., vol. 90, no. 5, pp. 2057-2121, 2001.
[8] H. Iwai and S. Ohmi, "CMOS downsizing and high-K gate insulator
technology," in Proceedings of the Fourth IEEE International Caracas
Conference on Devices, Circuits and Systems, 2002, pp. D049-1-D049-8.
[9] R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, "Introduction to flash
memory," Proceedings of the IEEE, vol. 91, no. 4, pp. 489-502, 2003.
[10] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, and K. Chan, "A
silicon nanocrystals based memory," Appl. Phys. Lett., vol. 68, no. 10, pp.
1377-1379, 1996.
[11] S. Inumiya, K. Sekine, S. Niwa, A. Kaneko, M. Sato, T. Watanabe, H. Fukui, Y.
Kamata, M. Koyama, A. Nishiyama, M. Takayanagi, K. Eguchi, and Y.
Tsunashima, "Fabrication of HfSiON gate dielectrics by plasma oxidation and
nitridation, optimized for 65 nm mode low power CMOS applications," in
Symp. VLSI Tech. Dig., 2003, pp. 17-18.
[12] K. Sekine, S. Inumiya, M. Sato, A. Kaneko, K. Eguchi, and Y. Tsunashima,
"Nitrogen profile control by plasma nitridation technique for poly-Si gate HfSiON CMOSFET with excellent interface property and ultra-low leakage
current," in IEDM Tech. Dig., 2003, pp. 103-106.
[13] T. Watanabe, M. Takayanagi, R. Iijima, K. Ishimaru, H. Ishiuchi, and Y.
Tsunashima, "Design guideline of HfSiON gate dielectrics for 65 nm CMOS generation," in Symp. VLSI Tech. Dig., 2003, pp. 19-20.
[14] A. Kaneko, Y. Kamata, M. Ono, M. Koyama, A. Nishiyama, Y. Kamimuta, C.
Hongo, A. Takashima, D. Gao, and S. Inumiya, "Plasma Nitridation Technique
for the Formation of Thermally Stable Hf-Silicate Gate Dielectric with
Controlled Nitrogen Profile," in Ext. Abst. 2002 Int. Conf. Solid State Devices
and Materials (SSDM), 2002, pp. 742-743.
[15] A. L. P. Rotondaro, M. R. Visokay, J. J. Chambers, A. Shanware, R.
Khamankar, H. Bu, R. T. Laaksonen, L. Tsung, M. Douglas, R. Kuan, M. J.
Bevan, T. Grider, J. McPherson, and L. Colombo, "Advanced CMOS
transistors with a novel HfSiON gate dielectric," in Symp. VLSI Tech. Dig.,
2002, pp. 148-149.
[16] A. Shanware, J. McPherson, M. R. Visokay, J. J. Chambers, A. L. P.
Rotondaro, H. Bu, M. J. Bevan, R. Khamankar, and L. Colombo, "Reliability
evaluation of HfSiON gate dielectric film with 12.8 Å SiO2 equivalent
thickness," in IEDM Tech. Dig., 2001, pp. 137-140.
[17] J. C. Wang, D. C. Shie, T. F. Lei, and C. L. Lee, "Characterization of
Temperature Dependence for HfO2 Gate Dielectrics Treated in NH3 Plasma,"
Electrochem. Solid-State Lett., vol. 6, no. 10, pp. F34-F36, 2003.
[18] M. Koyama, A. Kaneko, T. Ino, M. Koike, Y. Kamata, R. Iijima, Y. Kamimuta,
A. Takashima, M. Suzuki, C. Hongo, S. Inumiya, M. Takayanagi, and A.
Nishiyama, "Effects of nitrogen in HfSiON gate dielectric on the electrical and
thermal characteristics," in IEDM Tech. Dig., 2002, pp. 849-852.
[19] C. S. Kang, H. J. Cho, K. Onishi, R. Choi, Y. H. Kim, R. Nieh, J. Han, S.
Krishnan, A. Shahriar, and J. C. Lee, "Nitrogen concentration effects and
performance improvement of MOSFETs using thermally stable HfOxNy gate
dielectrics," in IEDM Tech. Dig., 2002, pp. 865-868.
[20] H.-S. Jung, Y.-S. Kim, J. P. Kim, J. H. Lee, J.-H. Lee, N.-I. Lee, H.-K. Kang,
K.-P. Suh, H. J. Ryu, C.-B. Oh, Y.-W. Kim, K.-H. Cho, H.-S. Baik, Y. S.
Chung, H. S. Chang, and D. W. Moon, "Improved current performance of
CMOSFETs with nitrogen incorporated HfO2-Al2O3 laminate gate dielectric,"
in IEDM Tech. Dig., 2002, pp. 853-856.
[21] Y. Morisaki, T. Aoyama, Y. Sugita, K. Irino, T. Sugii, and T. Nakamura,
"Ultra-thin (Teff
inv = 1.7 nm) poly-Si-gated SiN/HfO2/SiON high-k stack
dielectrics with high thermal stability (1050 °C)," in IEDM Tech. Dig., 2002, pp. 861-864.
[22] C. H. Choi, S. J. Rhee, T. S. Jeon, N. Lu, J. H. Sim, R. Clark, M. Niwa, and D.
L. Kwong, "Thermally stable CVD HfOxNy advanced gate dielectrics with
poly-Si gate electrode," in IEDM Tech. Dig., 2002, pp. 857-860.
[23] D. Ishikawa, S. Sakai, K. Katsuyama, and A. Hiraiwa,
"Nitride-sandwiched-oxide gate insulator for low power CMOS," in IEDM
Tech. Dig., 2002, pp. 869-872.
[24] H.-J. Cho, C. S. Kang, K. Onishi, S. Gopalan, R. Nieh, C. Rino, S. Krishnan,
and J. C. Lee, "Structural and electrical properties of HfO2 with top nitrogen
incorporated layer," IEEE Electron Device Lett., vol. 23, no. 5, pp. 249-251,
2002.
[25] N.-J. Seong, S.-G. Yoon, S.-J. Yeom, H.-K. Woo, D.-S. Kil, J.-S. Roh, and
H.-C. Sohn, "Effect of nitrogen incorporation on improvement of leakage
properties in high-k HfO2 capacitors treated by N2-plasma," Appl. Phys. Lett.,
vol. 87, no. 13, pp. 132903, 2005.
[26] T. M. Pan, T. F. Lei, and T. S. Chao, "Comparison of ultrathin CoTiO3 and
NiTiO3 high-k gate dielectrics," J. Appl. Phys., vol. 89, no. 6, pp. 3447-3452,
2001.
[27] T. M. Pan, T. F. Lei, T. S. Chao, K. L. Chang, and K. C. Hsieh, "High Quality
Ultrathin CoTiO3 High-k Gate Dielectrics," Electrochem. Solid-State Lett., vol.
3, no. 9, pp. 433-434, 2000.
[28] G. D. Wilk and R. M. Wallace, "Electrical properties of hafnium silicate gate
dielectrics deposited directly on silicon," Appl. Phys. Lett., vol. 74, no. 19, pp.
2854-2856, 1999.
[29] D. A. Neumayer and E. Cartier, "Materials characterization of ZrO2-SiO2 and
HfO2-SiO2 binary oxides deposited by chemical solution deposition," J. Appl.
Phys., vol. 90, no. 4, pp. 1801-1808, 2001.
[30] G. D. Wilk, R. M. Wallace, and J. M. Anthony, "Hafnium and zirconium
silicates for advanced gate dielectrics," J. Appl. Phys., vol. 87, no. 1, pp.
484-492, 2000.
[31] M. R. Visokay, J. J. Chambers, A. L. P. Rotondaro, A. Shanware, and L.
Colombo, "Application of HfSiON as a gate dielectric material," Appl. Phys.
Lett., vol. 80, no. 17, pp. 3183-3185, 2002.
[32] P. Lysaght, B. Foran, S. Stemmer, G. Bersuker, J. Bennett, R. Tichy, L. Larson,
and H. R. Huff, "Thermal response of MOCVD hafnium silicate,"
Microelectron. Eng., vol. 69, no. 2-4, pp. 182-189, 2003.
[33] R. G. Gordon, J. Becker, D. Hausmann, and S. Suh, "Vapor Deposition of
Metal Oxides and Silicates: Possible Gate Insulators for Future Microelectronics," Chem. Mater., vol. 13, no. 8, pp. 2463-2464, 2001.
[34] R. G. Gordon, "Automatic Control of Stoichiometry in CVD of Metal Silicates
by Alternating Surface Reactions," in Fundamental Gas-Phase and Surface
Chemistry of Vapor Deposition II/Process Control, Diagnostics and Modeling
in Semiconductor Manufacturing IV, vol. PV 2001-13, Electrochem. Soc.
Proc., M. D. Allendorf, M. T. Swihart, and M. Meyyappan, Eds. Washington,
DC: The Electrochemical Society, 2001, pp. 136-143.
[35] D. Hausmann, J. Becker, S. Wang, and R. G. Gordon, "Rapid Vapor Deposition
of Highly Conformal Silica Nanolaminates," Science, vol. 298, no. 5592, pp.
402-406, 2002.
[36] J. L. Roberts, P. A. Marshall, A. C. Jones, P. R. Chalker, J. F. Bickley, P. A.
Williams, S. Taylor, L. M. Smith, G. W. Critchlow, M. Schumacher, and J.
Lindner, "Deposition of hafnium silicate films by liquid injection MOCVD
using a single source or dual source approach," J. Mater. Chem., vol. 14, no. 3,
pp. 391-395, 2004.
[37] H. Watanabe, T. Tatsumi, S. Ohnishi, H. Kitajima, I. Honma, T. Ikarashi, and
H. Ono, "Hemispherical grained Si formation on in-situ phosphorus doped
amorphous-Si electrode for 256 Mb DRAM's capacitor," IEEE Trans. Electron
Devices, vol. 42, no. 7, pp. 1247-1254, 1995.
[38] T.-S. Chao, W.-M. Ku, H.-C. Lin, D. Landheer, Y.-Y. Wang, and Y. Mori,
"CoTiO3 high-κ dielectrics on HSG for DRAM applications," IEEE Trans.
Electron Devices, vol. 51, no. 12, pp. 2200-2204, 2004.
[39] H. Akazawa, "Self-limiting size control of hemispherical grains of
microcrystalline Si self-assembled on an amorphous Si film surface," Appl.
Phys. Lett., vol. 82, no. 9, pp. 1464-1466, 2003.
[40] H. Akazawa, "Intermediate crystalline states produced by isothermal annealing
of sputter-deposited a-Si films," J. Appl. Phys., vol. 97, no. 4, pp. 043518,
2005.
[41] N. Sugiyama, T. Tezuka, and A. Kurobe, "Fabrication of nano-crystal silicon
on SiO2 using the agglomeration process," J. Cryst. Growth, vol. 192, no. 3-4,
pp. 395-401, 1998.
[42] Y. Wakayama, T. Tagami, and S.-i. Tanaka, "Formation of Si islands from
amorphous thin films upon thermal annealing," J. Appl. Phys., vol. 85, no. 12,
pp. 8492-8494, 1999.
[43] Y. Wakayama, T. Tagami, and S.-i. Tanaka, "Three-dimensional islands of Si
and Ge formed on SiO2 through crystallization and agglomeration from
amorphous thin films," Thin Solid Films, vol. 350, no. 1-2, pp. 300-307, 1999.
[44] R. Nuryadi, Y. Ishikawa, and M. Tabe, "Formation and ordering of self-assembled Si islands by ultrahigh vacuum annealing of ultrathin bonded
silicon-on-insulator structure," Appl. Surf. Sci., vol. 159-160, pp. 121-126,
2000.
[45] R. Nuryadi, Y. Ishikawa, Y. Ono, and M. Tabe, "Thermal agglomeration of
single-crystalline Si layer on buried SiO2 in ultrahigh vacuum," J. Vac. Sci.
Technol. B, vol. 20, no. 1, pp. 167-172, 2002.
[46] B. Legrand, V. Agache, J. P. Nys, V. Senez, and D. Stievenard, "Formation of
silicon islands on a silicon on insulator substrate upon thermal annealing,"
Appl. Phys. Lett., vol. 76, no. 22, pp. 3271-3273, 2000.
[47] B. Legrand, V. Agache, T. Melin, J. P. Nys, V. Senez, and D. Stievenard,
"Thermally assisted formation of silicon islands on a silicon-on-insulator
substrate," J. Appl. Phys., vol. 91, no. 1, pp. 106-111, 2002.
[48] D. T. Danielson, D. K. Sparacin, J. Michel, and L. C. Kimerling,
"Surface-energy-driven dewetting theory of silicon-on-insulator
agglomeration," J. Appl. Phys., vol. 100, no. 8, pp. 083507, 2006.
[49] P. J. Cumpson and M. P. Seah, "Elastic Scattering Corrections in AES and
XPS. II. Estimating Attenuation Lengths and Conditions Required for their
Valid Use in Overlayer/Substrate Experiments," Surf. Interface Anal., vol. 25,
no. 6, pp. 430-446, 1997.
[50] L. C. Feldman and J. W. Mayer, Fundamentals of Surface and Thin Film
Analysis. New York: North-Holland, 1986.
[51] T. Ogama, "A new method to detect energy-band bending using x-ray
photoemission spectroscopy," J. Appl. Phys., vol. 64, no. 2, pp. 753-757, 1988.
[52] J. F. Moulder, W. F. Stickle, P. E. Sobol, and K. D. Bomben, Handbook of
X-ray Photoelectron Spectroscopy: A Reference Book of Standard Spectra for
Identification and Interpretation of XPS Data: Physical Electronics, 1995.
[53] Y. Taur, "CMOS design near the limit of scaling," IBM J. Res. Dev., vol. 46, no.
2/3, pp. 213, 2002.
[54] S. H. Lo, D. A. Buchanan, Y. Taur, and W. Wang, "Quantum-mechanical
modeling of electron tunneling current from the inversion layer of
ultra-thin-oxide nMOSFET's," IEEE Electron Device Lett., vol. 18, no. 5, pp.
209-211, 1997.
[55] K. Sekine, Y. Saito, M. Hirayama, and T. Ohmi, "Highly robust ultrathin
silicon nitride films grown at low-temperature by microwave-excitation
high-density plasma for giga scale integration," IEEE Trans. Electron Devices,
vol. 47, no. 7, pp. 1370-1374, 2000.
[56] M. Khare, G. Xin, X. W. Wang, T. P. Ma, G. J. Cui, T. Tamagawa, B. L.
Halpern, and J. J. Schmitt, "Ultra-thin Silicon Nitride Gate Dielectric for Deep-sub-micron CMOS Devices," in Symp. VLSI Tech. Dig., 1997, pp. 51-52.
[57] C.-S. Kuo, J.-F. Hsu, S.-W. Huang, L.-S. Lee, M.-J. Tsai, and J.-G. Hwu,
"High-k Al2O3 gate dielectrics prepared by oxidation of aluminum film in
nitric acid followed by high-temperature annealing," IEEE Trans. Electron
Devices, vol. 51, no. 6, pp. 854-858, 2004.
[58] D. S. Yu, C. H. Huang, A. Chin, Z. Chunxiang, M. F. Li, C. Byung Jin, and K.
Dim-Lee, "Al2O3-Ge-on-insulator n- and p-MOSFETs with fully NiSi and
NiGe dual gates," IEEE Electron Device Lett., vol. 25, no. 3, pp. 138-140,
2004.
[59] L. Manchanda, W. H. Lee, J. E. Bower, F. H. Baumann, W. L. Brown, C. J.
Case, R. C. Keller, Y. O. Kim, E. J. Laskowski, M. D. Morris, R. L. Opila, P. J.
Silverman, T. W. Sorsch, and G. R. Weber, "Gate quality doped high K films
for CMOS beyond 100 nm: 3-10 nm Al2O3 with low leakage and low interface
states," in IEDM Tech. Dig., 1998, pp. 605-608.
[60] H. Yu, M.-F. Li, and D.-L. Kwong, "Thermally robust HfN metal as a
promising gate electrode for advanced MOS device applications," IEEE Trans.
Electron Devices, vol. 51, no. 4, pp. 609-615, 2004.
[61] J. Lu, Y. Kuo, and J.-Y. Tewg, "Hafnium-Doped Tantalum Oxide High-k Gate
Dielectrics," J. Electrochem. Soc., vol. 153, no. 5, pp. G410-G416, 2006.
[62] W. J. Zhu, T. P. Ma, S. Zafar, and T. Tamagawa, "Charge trapping in ultrathin
hafnium oxide," IEEE Electron Device Lett., vol. 23, no. 10, pp. 597-599,
2002.
[63] Y.-Y. Fan, R. E. Nieh, J. C. Lee, G. Lucovsky, G. A. Brown, L. F. Register, and
S. K. Banerjee, "Voltage- and temperature-dependent gate capacitance and
current model: application to ZrO2 n-channel MOS capacitor," IEEE Trans.
Electron Devices, vol. 49, no. 11, pp. 1969-1978, 2002.
[64] I. Kim, J. Koo, J. Lee, and H. Jeon, "A Comparison of Al2O3/HfO2 and
Al2O3/ZrO2 Bilayers Deposited by the Atomic Layer Deposition Method for
Potential Gate Dielectric Applications," Jpn. J. Appl. Phys., vol. 45, no. 2A, pp.
919-925, 2006.
[65] C. H. Lee, H. F. Luan, W. P. Bai, S. J. Lee, T. S. Jeon, Y. Senzaki, D. Roberts,
and D. L. Kwong, "MOS characteristics of ultra thin rapid thermal CVD ZrO2
and Zr silicate gate dielectrics," in IEDM Tech. Dig., 2000, pp. 27-30.
[66] G. C. F. Yeap, S. Krishnan, and M.-R. Lin, "Fringing-induced barrier lowering
(FIBL) in sub-100 nm MOSFETs with high-K gate dielectrics," Electron. Lett.,
vol. 34, no. 11, pp. 1150-1152, 1998.
[67] F.-C. Chiu, J.-J. Wang, J. Y.-M. Lee, and S. C. Wu, "Leakage currents in
amorphous Ta2O5 thin films," J. Appl. Phys., vol. 81, no. 10, pp. 6911-6915, 1997.
[68] A. Paskaleva, E. Atanassova, and T. Dimitrova, "Leakage currents and
conduction mechanisms of Ta2O5 layers on Si obtained by RF sputtering,"
Vacuum, vol. 58, no. 2-3, pp. 470-477, 2000.
[69] S. Kamiyama, T. Miura, Y. Nara, and T. Arikado, "Structural and Electrical
Properties of Nitrogen-Incorporated MOCVD Hf-Silicate Gate Dielectrics
Treated by Plasma Nitridation in an Ar/N2 Ambient," J. Electrochem. Soc., vol.
152, no. 10, pp. G750-G753, 2005.
[70] K.-J. Choi, J.-H. Kim, and S.-G. Yoon, "Plasma Nitration of HfO2 Gate
Dielectric in Nitrogen Ambient for Improvement of TaN/HfO2/Si
Performance," Electrochem. Solid-State Lett., vol. 7, no. 10, pp. F59-F61,
2004.
[71] J. L. Gavartin, A. L. Shluger, A. S. Foster, and G. I. Bersuker, "The role of
nitrogen-related defects in high-k dielectric oxides: Density-functional
studies," J. Appl. Phys., vol. 97, no. 5, pp. 053704, 2005.
[72] S. A. Krishnan, M. Quevedo, R. Harris, P. D. Kirsch, R. Choi, B. H. Lee, G.
Bersuker, and J. C. Lee, "Negative Bias Temperature Instability Dependence
on Dielectric Thickness and Nitrogen Concentration in Ultra-scaled HfSiON
Dielectric/TiN Gate Stacks," Jpn. J. Appl. Phys., vol. 45, no. 4B, pp.
2945-2948, 2006.
[73] M. Bhat, D. J. Wristers, L.-K. Han, J. Yan, H. J. Fulford, and D.-L. Kwong,
"Electrical properties and reliability of MOSFET's with rapid thermal
NO-nitrided SiO2 gate dielectrics," IEEE Trans. Electron Devices, vol. 42, no.
5, pp. 907-914, 1995.
[74] N. Umezawa, K. Shiraishi, T. Ohno, H. Watanabe, T. Chikyow, K. Torii, K.
Yamabe, K. Yamada, H. Kitajima, and T. Arikado, "First-principles studies of
the intrinsic effect of nitrogen atoms on reduction in gate leakage current
through Hf-based high-k dielectrics," Appl. Phys. Lett., vol. 86, no. 14, pp.
143507, 2005.
[75] S. Chakraborty, M. K. Bera, C. K. Maiti, and P. K. Bose, "Effects of annealing
on the electrical properties of TiO2 films deposited on Ge-rich SiGe
substrates," J. Appl. Phys., vol. 100, no. 2, pp. 023706, 2006.
[76] K. J. Hubbard and D. G. Schlom, "Thermodynamic stability of binary oxides
in contact with silicon," J. Mater. Res., vol. 11, no. 11, pp. 2757-2776, 1996.
[77] G. Maciej, E. J. John, L. Chun-Li, S. Matt, I. H. Rama, S. R. Raghaw, and J. T.
Philip, "Thermodynamic stability of high-K dielectric metal oxides ZrO2 and
HfO2 in contact with Si and SiO2," Appl. Phys. Lett., vol. 80, no. 11, pp.
1897-1899, 2002.
[78] M. Lee, Z. H. Lu, W. T. Ng, D. Landheer, X. Wu, and S. Moisa, "Interfacial
growth in HfOxNy gate dielectrics deposited using [(C2H5)2N]4Hf with O2 and
NO," Appl. Phys. Lett., vol. 83, no. 13, pp. 2638-2640, 2003.
[79] M. S. Joo, B. J. Cho, C. C. Yeo, D. Siu Hung Chan, S. J. Whoang, S. Mathew,
L. Kanta Bera, N. Balasubramanian, and D.-L. Kwong, "Formation of
hafnium-aluminum-oxide gate dielectric using single cocktail liquid source in
MOCVD process," IEEE Trans. Electron Devices, vol. 50, no. 10, pp.
2088-2094, 2003.
[80] B. C. Hendrix, A. S. Borovik, C. Xu, J. F. Roeder, T. H. Baum, M. J. Bevan, M.
R. Visokay, J. J. Chambers, A. L. P. Rotondaro, H. Bu, and L. Colombo,
"Composition control of Hf1-xSixO2 films deposited on Si by chemical-vapor
deposition using amide precursors," Appl. Phys. Lett., vol. 80, no. 13, pp.
2362-2364, 2002.
[81] C. F. Powell, in Chemically Deposited Nonmetals, C. F. Powell, J. H. Oxley,
and J. M. Blocher, Eds. New York: John Wiley and Sons, Inc., 1966, pp.
343-420.
[82] K. Kukli, M. Ritala, T. Sajavaara, J. Keinonen, and M. Leskela, "Comparison
of hafnium oxide films grown by atomic layer deposition from iodide and
chloride precursors," Thin Solid Films, vol. 416, no. 1-2, pp. 72-79, 2002.
[83] K. Forsgren, A. Harsta, J. Aarik, A. Aidla, J. Westlinder, and J. Olsson,
"Deposition of HfO2 Thin Films in HfI4-Based Processes," J. Electrochem.
Soc., vol. 149, no. 10, pp. F139-F144, 2002.
[84] K. Kukli, J. Aarik, M. Ritala, T. Uustare, T. Sajavaara, J. Lu, J. Sundqvist, A.
Aidla, L. Pung, A. Harsta, and M. Leskela, "Effect of selected atomic layer
deposition parameters on the structure and dielectric properties of hafnium
oxide films," J. Appl. Phys., vol. 96, no. 9, pp. 5298-5307, 2004.
[85] M. M. Frank, Y. J. Chabal, M. L. Green, A. Delabie, B. Brijs, G. D. Wilk, M.-Y.
Ho, E. B. O. da Rosa, I. J. R. Baumvol, and F. C. Stedile, "Enhanced initial
growth of atomic-layer-deposited metal oxides on hydrogen-terminated
silicon," Appl. Phys. Lett., vol. 83, no. 4, pp. 740-742, 2003.
[86] J. F. Conley Jr., Y. Ono, D. J. Tweet, W. Zhuang, and R. Solanki, "Atomic
layer deposition of thin hafnium oxide films using a carbon free precursor," J.
Appl. Phys., vol. 93, no. 1, pp. 712-718, 2003.
[87] D. M. Hausmann, E. Kim, J. Becker, and R. G. Gordon, "Atomic Layer
Deposition of Hafnium and Zirconium Oxides Using Metal Amide
Precursors," Chem. Mater., vol. 14, no. 10, pp. 4350-4358, 2002.
[88] A. Deshpande, R. Inman, G. Jursich, and C. Takoudis, "Atomic layer
deposition and characterization of hafnium oxide grown on silicon from tetrakis(diethylamino)hafnium and water vapor," J. Vac. Sci. Technol., A, vol.
22, no. 5, pp. 2035-2040, 2004.
[89] M. Ritala, K. Kukli, A. Rahtu, P. I. Räisänen, M. Leskelä, T. Sajavaara, and J.
Keinonen, "Atomic Layer Deposition of Oxide Thin Films with Metal
Alkoxides as Oxygen Sources," Science, vol. 288, no. 5464, pp. 319-321,
2000.
[90] W.-K. Kim, S.-W. Kang, S.-W. Rhee, N.-I. Lee, J.-H. Lee, and H.-K. Kang,
"Atomic layer deposition of zirconium silicate films using zirconium
tetrachloride and tetra-n-butyl orthosilicate," J. Vac. Sci. Technol., A, vol. 20,
no. 6, pp. 2096-2100, 2002.
[91] W.-K. Kim, S.-W. Kang, and S.-W. Rhee, "Atomic layer deposition of
zirconium silicate films using zirconium tetra-tert-butoxide and silicon
tetrachloride," J. Vac. Sci. Technol., A, vol. 21, no. 5, pp. L16-L18, 2003.
[92] J. R. Hauser and K. Ahmed, "Characterization of ultra-thin oxides using
electrical C-V and I-V measurements," in Characterization and Metrology for
ULSI Technology : 1998 International Conference, vol. 449, AIP Conference
Proceedings, D. G. Seiler, A. C. Diebold, W. M. Bullis, T. J. Shaffner, R.
McDonald, and E. J. Walters, Eds.: American Institute of Physics, 1998, pp.
235-239.
[93] Y.-H. Lin, C.-H. Chien, C.-T. Lin, C.-Y. Chang, and T.-F. Lei,
"High-performance nonvolatile HfO2 nanocrystal memory," IEEE Electron
Device Lett., vol. 26, no. 3, pp. 154-156, 2005.
[94] H.-C. You, T.-H. Hsu, F.-H. Ko, J.-W. Huang, and T.-F. Lei, "Hafnium silicate
nanocrystal memory using sol-gel-spin-coating method," IEEE Electron
Device Lett., vol. 27, no. 8, pp. 644-646, 2006.
[95] E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Physics
and Technology: John Wiley & Sons, 1991.
[96] J. De Blauwe, "Nanocrystal nonvolatile memory devices," IEEE Trans.
Nanotechnol., vol. 1, no. 1, pp. 72-77, 2002.
[97] P. Punchaipetch, T. Okamoto, H. Nakamura, Y. Uraoka, T. Fuyuki, and S.
Horii, "Effect of nitrogen on electrical and physical properties of polyatomic
layer chemical vapor deposition HfSixOy gate dielectrics," Jpn. J. Appl. Phys.,
Part 1, vol. 43, no. 11B, pp. 7815-7820, 2004.
[98] A. Nakajima, Y. Sugita, K. Kawamura, H. Tomita, and N. Yokoyama, "Si
Quantum Dot Formation with Low-Pressure Chemical Vapor Deposition " Jpn.
J. Appl. Phys., vol. 35, no. 2B, pp. L189-L191, 1996.
[99] M. Fukuda, K. Nakagawa, S. Miyazaki, and M. Hirose, "Resonant tunneling
through a self-assembled Si quantum dot," Appl. Phys. Lett., vol. 70, no. 17, pp. 2291-2293, 1997.
[100] A. Kohno, H. Murakami, M. Ikeda, S. Miyazaki, and M. Hirose, "Memory
operation of silicon quantum-dot floating-gate metal-oxide-semiconductor
field-effect transistors," Jpn. J. Appl. Phys., vol. 40, no. 7B, pp. L721-L723,
2001.
[101] K. Ichikawa, P. Punchaipetch, H. Yano, T. Hatayama, Y. Uraoka, T. Fuyuki, E.
Takahashi, T. Hayashi, and K. Ogata, "Electron Injection into Si Nanodot
Fabricated by Side-Wall Plasma Enhanced Chemical Vapor Deposition," Jpn.
J. Appl. Phys., vol. 44, no. 26, pp. L836-L838, 2005.
[102] D. N. Kouvatsos, V. Ioannou-Sougleridis, and A. G. Nassiopoulou, "Charging
effects in silicon nanocrystals within SiO2 layers, fabricated by chemical vapor
deposition, oxidation, and annealing," Appl. Phys. Lett., vol. 82, no. 3, pp.
397-399, 2003.
[103] F. Yun, B. J. Hinds, S. Hatatani, and S. Oda, "Room temperature
single-electron narrow-channel memory with silicon nanodots embedded in
SiO2 matrix," Jpn. J. Appl. Phys., vol. 39, no. 8 A, pp. L792-L795, 2000.
[104] F. Iacona, G. Franzo, and C. Spinella, "Correlation between luminescence and
structural properties of Si nanocrystals," J. Appl. Phys., vol. 87, no. 3, pp.
1295-1303, 2000.
[105] C. Busseret, A. Souifi, T. Baron, S. Monfray, N. Buffet, E. Gautier, and M. N.
Semeria, "Electronic properties of silicon nanocrystallites obtained by SiOx
(x<2) annealing " Mater. Sci. Eng., C, vol. 19, no. 1-2, pp. 237-241, 2002.
[106] H. I. Hanafi, S. Tiwari, and I. Khan, "Fast and long retention-time nano-crystal
memory," IEEE Trans. Electron Devices, vol. 43, no. 9, pp. 1553-1558, 1996.
[107] K. S. Min, K. V. Shcheglov, C. M. Yang, H. A. Atwater, M. L. Brongersma,
and A. Polman, "Defect-related versus excitonic visible light emission from
ion beam synthesized Si nanocrystals in SiO2," Appl. Phys. Lett., vol. 69, no.
14, pp. 2033-2035, 1996.
[108] E. Kapetanakis, P. Normand, D. Tsoukalas, K. Beltsios, J. Stoemenos, S.
Zhang, and J. van den Berg, "Charge storage and interface states effects in
Si-nanocrystal memory obtained using low-energy Si+ implantation and
annealing," Appl. Phys. Lett., vol. 77, no. 21, pp. 3450-3452, 2000.
[109] Y. Liu, T. P. Chen, C. Y. Ng, M. S. Tse, S. Fung, Y. C. Liu, S. Li, and P. Zhao,
"Charging Effect on Electrical Characteristics of MOS Structures with Si
Nanocrystal Distribution in Gate Oxide," Electrochem. Solid-State Lett., vol. 7,
no. 7, pp. G134-G137, 2004.
[110] C. Y. Ng, T. P. Chen, L. Ding, and S. Fung, "Memory characteristics of
MOSFETs with densely stacked silicon nanocrystal Layers in the gate oxide synthesized by low-energy ion beam," IEEE Electron Device Lett., vol. 27, no.
4, pp. 231-233, 2006.
[111] M. L. Ostraat, J. W. D. Blauwe, M. L. Green, L. D. Bell, H. A. Atwater, and R.
C. Flagan, "Ultraclean Two-Stage Aerosol Reactor for Production of
Oxide-Passivated Silicon Nanoparticles for Novel Memory Devices," J.
Electrochem. Soc., vol. 148, no. 5, pp. G265-G270, 2001.
[112] M. L. Ostraat, J. W. D. Blauwe, M. L. Green, L. D. Bell, M. L. Brongersma, J.
Casperson, R. C. Flagan, and H. A. Atwater, "Synthesis and characterization of
aerosol silicon nanocrystal nonvolatile floating-gate memory devices," Appl.
Phys. Lett., vol. 79, no. 3, pp. 433-435, 2001.
[113] S. Miyazaki, Y. Hamamoto, E. Yoshida, M. Ikeda, and M. Hirose, "Control of
self-assembling formation of nanometer silicon dots by low pressure chemical
vapor deposition," Thin Solid Films, vol. 369, no. 1-2, pp. 55-59, 2000.
[114] F. Mazen, T. Baron, G. Bremond, N. Buffet, N. Rochat, P. Mur, and M. N.
Semeria, "Influence of the Chemical Properties of the Substrate on Silicon
Quantum Dot Nucleation," J. Electrochem. Soc., vol. 150, no. 3, pp.
G203-G208, 2003.
[115] B. De Salvo, C. Gerardi, S. Lombardo, T. Baron, L. Perniola, D. Mariolle, P.
Mur, A. Toffoli, M. Gely, M. N. Semeria, S. Deleonibus, G. Ammendola, V.
Ancarani, M. Melanotte, R. Bez, L. Baldi, D. Corso, I. Crupi, R. A. Puglisi, G.
Nicotra, E. Rimini, F. Mazen, G. Ghibaudo, G. Pananakakis, C. M.
Compagnoni, D. Ielmini, A. Lacaita, A. Spinelli, Y. M. Wan, and K. van der
Jeugd, "How far will silicon nanocrystals push the scaling limits of NVMs
technologies?," in IEDM Tech. Dig., 2003, pp. 597-600.
[116] F. Mazen, T. Baron, A. M. Papon, R. Truche, and J. M. Hartmann, "A two
steps CVD process for the growth of silicon nano-crystals," Appl. Surf. Sci.,
vol. 214, no. 1-4, pp. 359-363, 2003.
[117] D. Cha, J. H. Shin, S. Park, E. Lee, Y. Park, Y. Park, I.-K. Yoo, K. S. Seol, and
S.-H. Choi, "High trap density and long retention time from self-assembled
amorphous Si nanocluster floating gate nonvolatile memory," Appl. Phys. Lett.,
vol. 89, no. 24, pp. 243513, 2006.
[118] S. Iwata and A. Ishizaka, "Electron spectroscopic analysis of the SiO2/Si
system and correlation with metal-oxide-semiconductor device
characteristics," J. Appl. Phys., vol. 79, no. 9, pp. 6653-6713, 1996.
[119] Z. H. Lu, J. P. McCaffrey, B. Brar, G. D. Wilk, R. M. Wallace, L. C. Feldman,
and S. P. Tay, "SiO2 film thickness metrology by x-ray photoelectron
spectroscopy," Appl. Phys. Lett., vol. 71, no. 19, pp. 2764-2766, 1997.
[120] D. F. Mitchell, K. B. Clark, J. A. Bardwell, W. N. Lennard, G. R. Massoumi, and I. V. Mitchell, "Film thickness measurements of SiO2 by XPS," Surf.
Interface Anal., vol. 21, no. 1, pp. 44-50, 1994.
[121] C. van der Marel, M. Yildirim, and H. R. Stapert, "Multilayer approach to the
quantitative analysis of x-ray photoelectron spectroscopy results: Applications
to ultrathin SiO2 on Si and to self-assembled monolayers on gold," J. Vac. Sci.
Technol. A, vol. 23, no. 5, pp. 1456-1470, 2005.
[122] Y. Y. Lebedinskii, A. Zenkevich, E. P. Gusev, and M. Gribelyuk, "In situ
investigation of growth and thermal stability of ultrathin Si layers on the
HfO2/Si (100) high-κ dielectric system," Appl. Phys. Lett., vol. 86, no. 19, pp.
191904, 2005.
[123] P. Sutter, W. Ernst, Y. S. Choi, and E. Sutter, "Mechanisms of thermally
induced dewetting of ultrathin silicon-on-insulator," Appl. Phys. Lett., vol. 88,
no. 14, pp. 141924, 2006.
[124] E. Dornel, J. C. Barbe, F. d. Crecy, G. Lacolle, and J. Eymery, "Surface
diffusion dewetting of thin solid films: Numerical method and application to
Si/SiO2," Phys. Rev. B, vol. 73, no. 11, pp. 115427, 2006.
[125] A. Thean and J. P. Leburton, "Geometry and strain effects on single-electron
charging in silicon nano-crystals," J. Appl. Phys., vol. 90, no. 12, pp.
6384-6390, 2001.
[126] J. H. Oh, Y. Park, K.-S. An, Y. Kim, J. R. Ahn, J. Y. Baik, and C. Y. Park,
"Chemical phase transitions of the HfO2/SiON/Si nanolaminate by
high-temperature thermal treatments in NO and O2 ambient," Appl. Phys. Lett.,
vol. 86, no. 26, pp. 262906, 2005.
[127] J. E. Griffith and D. A. Grigg, "Dimensional metrology with scanning probe
microscopes," Journal of Applied Physics, vol. 74, no. 9, pp. R83-R109, 1993.
[128] B. De Salvo, G. Ghibaudo, G. Pananakakis, P. Masson, T. Baron, N. Buffet, A.
Fernandes, and B. Guillaumot, "Experimental and theoretical investigation of
nano-crystal and nitride-trap memory devices," IEEE Trans. Electron Devices,
vol. 48, no. 8, pp. 1789-1799, 2001.
[129] K. C. Scheer, R. A. Rao, R. Muralidhar, S. Bagchi, J. Conner, L. Lozano, C.
Perez, M. Sadd, and B. E. White, Jr., "Thermal oxidation of silicon
nanocrystals in O2 and NO ambient," J. Appl. Phys., vol. 93, no. 9, pp.
5637-5642, 2003.
[130] H. Watanabe, N. Aoto, S. Adachi, and T. Kikkawa, "Device application and
structure observation for hemispherical-grained Si," J. Appl. Phys., vol. 71, no.
7, pp. 3538-3543, 1992.
[131] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd ed:
Wiley-Interscience, 2006.
[132] Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Effects of Interface Traps on
Charge Retention Characteristics in Silicon-Quantum-Dot-Based
Metal-Oxide-Semiconductor Diodes," Jpn. J. Appl. Phys., vol. 38, pp. 425-428,
1999.
[133] Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Effects of traps on charge
storage characteristics in metal-oxide-semiconductor memory structures based
on silicon nanocrystals," J. Appl. Phys., vol. 84, no. 4, pp. 2358-2360, 1998.
[134] M. She and T.-J. King, "Impact of crystal size and tunnel dielectric on
semiconductor nanocrystal memory performance," IEEE Trans. Electron
Devices, vol. 50, no. 9, pp. 1934-1940, 2003.
[135] A. Campera and G. Iannaccone, "Modelling and simulation of charging and
discharging processes in nanocrystal flash memories during program and erase
operations," Solid-State Electron., vol. 49, no. 11, pp. 1745-1753, 2005.
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1. 王培勳(2002)。我國社區發展工作之回顧。社區發展季刊,100,44-59。
2. 朱美珍(1995)。由人力資源網絡論社區意識的凝聚。社區發展季刊,69,67-74。
3. 朱美珍(1999)。台灣社區發展的歷史過程與未來發展。人文學報,4(23),61-81。
4. 李永展、馬立文(1998)。臺北縣市居民社區意識及環境認知之探討。臺灣土地金融季刊,33(1),5-89。
5. 李易駿(2002)。都市社區工作新思維:公民社會觀點的工作模式。社區發展季刊,100,148-163。
6. 林志成(1998)。社區總體營造的省思。社教資料雜誌,241,8-11。
7. 林振春(1995)。凝聚社區意識建構社會文化。社區發展季刊,69,25-39。
8. 林振春(1998)。社教機構在社區總體營造中的角色。社教資料雜誌,241,1-4。
9. 林瑞欽(1994)。社區意識的概念、測量與提振策略。社會發展研究學刊,1,1-21。
10. 侯錦雄、宋念謙(1998)。台中市黎明住宅社區居民社區意識之研究。建築學報,24,51-65。
11. 徐震(1997)。社區營造:台灣社區工作的新程式。社會建設,97,1-15。
12. 徐震(1999)。台灣社區工作的新形勢與新願景。社區發展季刊,88,168-176。
13. 張永進(2000)。許社區總體營造一個未來。社教雙月刊,98,35-38。
14. 梅高文(1994)。公民意識與志願服務。社區發展季刊,65,57-60。
15. 莊翰華、吳郁萍(2000)。「社區」總體「營造」之闡釋。社區發展季刊,90,170-181。
 
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