跳到主要內容

臺灣博碩士論文加值系統

(44.211.26.178) 您好!臺灣時間:2024/06/16 00:15
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果 :::

詳目顯示

: 
twitterline
研究生:謝易耕
研究生(外文):Yi-Keng Hsieh
論文名稱:射頻功率偵測器的應用
論文名稱(外文):Applications of RF Power Detectors
指導教授:郭建男郭建男引用關係
指導教授(外文):Chien-Nan Kuo
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:96
語文別:英文
論文頁數:80
中文關鍵詞:功率偵測器低雜訊放大器自我測試
外文關鍵詞:Power detectorsLNABuit-in self-test
相關次數:
  • 被引用被引用:1
  • 點閱點閱:489
  • 評分評分:
  • 下載下載:44
  • 收藏至我的研究室書目清單書目收藏:0
本論文提出兩個射頻功率偵測器的應用電路。主要是利用現有的射頻電路架構搭配一些功能性的類比電路,而以功率比較的方式達成射頻偵測的目的。第一個電路應用在WiMAX傳送端上。為了能完成I/Q自動校正的閉迴路系統,一個具有較寬動態範圍的射頻功率偵測電路是必須的。此電路使用了台積電0.18um,而模擬結果顯示在本地振盪器漏訊號,IQ增益及相位誤差補償模式下都符合規格要求。
另一個應用則是5GHz低雜訊放大器的自我測試電路。偵測待側電路增益的方法是以可調整式衰減器及兩個射頻功率偵測器的輸出進行比較的方式達成。後模擬結果顯示,可以完成一個增益為15.68dB的低雜訊放大器的偵測。不幸地,因為天線效應的影響,量測沒辦法和模擬結果相互驗證。之後,提出另一個自我測試電路的架構,主要是以電阻分壓的方式來克服對溫度及製程變異的影響。
In this thesis, two applications of RF power detector are designed using power comparing methodology as a design principle. The first application is the power detection design in WiMAX transmitter. In order to form a closed loop I/Q auto-calibrated system, a wide dynamic range power and detection circuit is necessary. Simulations results show that the power detection circuitry designed in TSMC 0.18um technology meets the specifications in all compensation mode, such as LO feedthrough, gain imbalance, and phase imbalance.
Another application of RF power detector is the built-in self-test design for a 5GHz LNA. The circuit under test is test by a variable attenuator and comparing the DC output of the power detectors. The post-simulation results show that the circuit achieves gain test for a 15.68dB, 5GHz LNA. Unfortunately, function verifications cannot be made due violations of the antenna rule. Another BIST architecture using voltage division by a resistor string is also proposed to break-through the bottlenecks of sensitive to process and temperature variations.
CONTENTS
Abstract (Chinese)……………………………………………I
Abstract (English)……………………………………………II
Acknowledgments………………………………………..….III
Contents………………………………………………………IV
Table Captions………………………………………………VII
Figure Captions……………………………………………VIII
Chapter I Introduction……………………………………1
1.1 Motivation……………………………………………………...1
1.2 Thesis Organization……………………………………………1
Chapter II Fundamentals of RF detection circuits………2
2.1 Introduction…………………………………………………….2
2.2 Meyer power detector………………………………………….3
2.3 Logarithmic amplifier………………………………………….9
Chapter III RF power detection circuit design in WiMAX transmitter………………………………………..16
3.1 Motivation……………………………………………………16
3.2 RF power detection circuit design…………………………....20
3.2.1 Input buffer……………………………………………………...21
3.2.2 Pre-amplifier……………………………………………………22
3.2.3 Meyer power detector & PD buffer…………………….……….23
3.2.4 Comparator………………………………………………...……26
3.3 Simulation results…………………………………………….30
3.4 Chip layout & summary………………………………………31
Chapter IV Built-in self-test circuit designs for 5GHz LNA
4.1 Introduction…………………………………………………33
4.2 RF BIST design with a digital step attenuator………………..34
4.2.1 The BIST architecture…………………………………………....34
4.2.2 Low noise amplifier…………………………………………….37
4.2.3 Switch A………………………………………………………...37
4.2.4 Power detector…………………………………………………38
4.2.5 Digital step attenuator………………………………………......43
4.2.6 Design guidelines of the DSA……………………………….….47
4.2.7 Post simulation results…………………………………………..48
4.2.8 Chip implementations and measurement……………………..53
4.3 RF BIST design with R-72R ladder………………………..…61
4.3.1 Variations of the DSA…………………………………….…….61
4.3.2 R-72R voltage attenuator……………………………………….64
4.3.3 R-72R ladder and power detector combination……………...…66
4.3.4 Current amp PD with high input impedance………………....69
4.3.5 Comparator……………………………………………………70
4.4 Summary…………………………………………………….…74

Chapter V Conclusion and Future Work
5.1 Conclusion……………………………………………………76
5.2 Future Work…………………………………………………..76
References……………………………………………………77
[1] Tsung-Nan Yu, “ Direct Up-Conversion Mixer with Matching Compensation Eliminating I/Q Imbalance and LO Feedthrough in WiMAX and WiFi Transmitter, “ Master Thesis, NCTU Hsin-Chu Taiwan, May 2008
[2] R.G. Meyer, “Low-Power Monolithic RF Peak Detector Analysis,” IEEE J. Solid State Circuits, vol. 30 no. 1, pp.65-67, Jan. 1995
[3] Tao Zhang, William R. Eienstadt, Robert M. Fox, and Qizhang Yin ” Bipolar Microwave RMS Power Detectors,” IEEE J. Solid State Circuits, vol. 41 no. 9, pp.2188-2192, Sep. 2006
[4] Tao Zhang, William R. Eienstadt, Robert M. Fox, ”A Novel 5GHz RF Power Detectors,” IEEE ISCAS, 2004, pp. 897-900.
[5] Qizhang Yin, William R. Eienstadt, Robert M. Fox, and Tao Zhang, “ A Translinear RMS Dectector for Embedded Test Of RF ICs,” IEEE Trans. Instrumentation and Measurement, vol. 54, no. 5, pp. 1708-1714, Oct. 2005.
[6] Alberto Valdes-Garcia, et al., “A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers,” IEEE VLSI Test Symp., 2005.
[7] Alberto Valdes-Garcia, et al., “Built-in Self Test of RF Transceiver SoCs: from Signal Chain to RF Synthesizers (Invited),” IEEE RFIC Symp., 2007, pp. 335-338.
[8] Alberto Valde-Garcia and Jose Silva-Martinez, “On-Chip Testing Techniques for RF Wireless Transceivers,” IEEE Design and Test of Computers, vol. 23, pp. 268-277, July 2006.
[9] H-H. Hsieh and L.-H. Lu, “Integrated CMOS power sensors for BIST applications,” IEEE VLSI Test Symp., 2006.
[10] Yen-Chih Huang, H-H. Hsieh and L.-H. Lu, “A low noise amplifier with integrated current and power sensors for RF BIST Applications,” IEEE VLSI Test Symp., 2007.
[11] Yijun Zhou and Michael Chia Yan Wah, ”A Wide Band CMOS RF Power Detector,” IEEE ISCAS, 2006, pp. 4228-4231.
[12] Kenneth A. Townsend, James W. Haslett, John Nielsen,”A CMOS Integrated Power Detector for UWB,” IEEE ISCAS, 2007, pp. 3039-3042.
[13] Richard Smith Hughes, Logarithmic Amplification with application to Radar and EW, Artech House, 1986.
[14] Po-Chiun Huang, Yi Huei Chen, and Chorng-Kuang Wang, “A 2V 10.7MHz CMOS Limiting Amplifier/RSSI,” IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1474-1479, Oct. 2000.
[15] Katsuji Kimura, “A CMOS Logarithmic IF Amplifier with Unbalanced Source-Couple Pairs,” J. Solid-State Circuits, vol. 28, no. 1, pp. 78-83, Jan. 1993.
[16] Kimmo Koli and Kari Halonen, “A 2.5 V temperature compensated CMOS logarithmic amplifier,” IEEE Custom Integrated Circuits Conf., May 1997, pp. 79-82.
[17] Chao Yang and Andrew Mason, “Process/Temperature Variation Tolerant Precision Signal Strength Indicator,” IEEE Trans. On Circuits Syst. I, Fundamental Theory and Applications, vol. 55, no. 3, pp. 722-729, Apr. 2008.
[18] Tsuneo Tsukahara and Masayuki Ishikawa, “A 2GHz 60dB Dynamic-Range Si Logarithmic/Limiting Amplifier with Low-Phase Deviations,” IEEE ISSCC, Feb. 1997.
[19] S. Khorram, A. Rofougaran, and A. A. Abidi, “A CMOS Limiting Amplifier and Signal-Strength Indicator,” IEEE Symp. VLSI Circuits Digest of Technical Papers, June 1995, pp.95-96.
[20] Stacy Ho, “A 450MHz CMOS RF Power Detector,” IEEE RFIC Symp., 2001, pp. 209-212.
[21] Jung-Suk Goo, Hee-Tae Ahn,, Donald J. Ladwig, Zhiping Yu, Thomas H. Lee, and Robert W. Dutton, ”A Noise Optimization Technique for Integrated Low-Noise Amplifiers,” IEEE J. Solid State Circuits, vol. 37 no.8, Aug. 2002
[22] Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001.
[23] F. B. Hildebrand, Advanced Calculus for Engineers. Englewood Cliffs, NJ: Prentice-Hall, 1949.
QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top