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研究生:黃智偉
研究生(外文):Chih-Wei Huang
論文名稱:以電流再利用之CMOS射頻前端關鍵元件設計
論文名稱(外文):The key components of CMOS RF front-end with current-reused approach
指導教授:鍾世忠鍾世忠引用關係吳霖堃
指導教授(外文):Shyh-Jong ChungLin-Kun Wu
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電信工程系所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2008
畢業學年度:96
語文別:中文
論文頁數:65
中文關鍵詞:電流再利用射頻前端
外文關鍵詞:current-reusedRF front-endCMOS
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本論文分為具帶拒濾波之低雜訊放大器和具內建震盪器之低功率混頻器兩個部分。利用標準TSMC 0.18 um RF CMOS 製程完成本論文中所設計的電路。
第一部分描述設計一個低功率之帶拒濾波低雜訊放大器。其量測結果之power gain在3~10GHz內大於9.5dB,NFmin為2.6dB,S11<-5.4dB,不包含緩衝級之功率消耗為6.8mW,接著使用主動式電感實現之微小化的帶拒濾波器,使得整體電路之core area只有0.0016 mm2。其量測之power gain為8~12dB、S11<-11dB、在2.5GHz和5.2GHz頻段附近抑制干擾訊號的效果分別為19dB及38dB,功率消耗為10.3mW,模擬之NFmin為2dB、P1dB為-14.2dB。
第二部分描述震盪器與混頻器之結合與設計。使用電流再利用的方式達到低功率的效果,並進一歩將平衡非平衡轉換器整合在電路中,它包含了一個混頻器和震盪器及一個balun。此整體電路可達功率增益為15dB,S11<-12dB,功率消耗為6mW。
The thesis consists of three parts: low noise amplifier, LNA with notch filters and low-power oscillator mixer. These propose circuits are fabricated using a standard TSMC 0.18 um RF CMOS process technology.
The first part of the thesis is the low power design of low noise amplifier with notch filters. The measurement result of LNA shows the power gain is more than 9.5dB in 3~10GHz, return loss is under -5.4dB, NFmin is 2.6dB, and power consumption exclude buffer is 6.8 mW. Then, we use the design of the miniaturized notch filters realized by active inductor, applied in the integration of LNA. The core area of LNA and notch filters is only 0.0016 mm2. The measurement result of LNA with notch filter shows the power gain is 8~12dB, return loss is under -7.5dB. The suppressed performance of notch filters in 2.5GHz and 5.2 GHz are 19dB and 38dB. The power consumption is 10.3 mW. The simulation results of minimum noise figure and P1dB are 2dB and -14.2dB.
The last part describes the combination of VCO and mixer. The circuit uses current-reuse to reach low power consumption, and furthermore a balun is integrated in this design. The total schematic contains mixer, VCO, and on-chip balun. The chip area is 1mmx1.5mm. The simulation results show the conversion gain are 15dB, return loss is under -12dB, P1dB is -16dB. The phase noise is -105 dBc/MHz. The total power consumption is 6mW.
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Thesis Organization 2
Chapter 2 General Backgrounds 3
2.1 Current-reused Structure 3
2.2 The Direct Conversion Receiver 6
2.3 The Basic Low Noise Amplifier 9
2.3.1 The analysis of transistor noise model [9] 9
2.3.2 The basic of low noise amplifier 10
2.4 Mixer Fundamentals 11
2.4.1 Principles of Mixer 11
2.4.2 Performance Parameters 12
2.4.2.1 Conversion Gain 12
2.4.2.2 Linearity 13
2.4.2.3 Isolation 15
2.4.3 Mixer Architecture 16
2.5 The Review of VCO 18
2.5.1 Principles of VCO 18
2.5.1.1 LC Tank Voltage-Controlled Oscillator 20
2.5.1.2 Ring Oscillator 22
2.5.2 Performance Parameters 22
2.5.2.1 Phase Noise 23
2.5.2.2 Frequency Tuning Range 24
2.5.3 Noise Model of VCO 25
2.5.3.1 Time Invariant Model 25
2.5.3.2 Time Variant Model 27
Chapter 3 The Design of LNA with Notch Filters for UWB 33
3.1 Circuit Design of the UWB LNA with low power 33
3.1.1 Input-matching stage 33
3.1.2 Output-matching stage 35
3.1.3 Noise analysis 36
3.2 The Integration of LNA with Notch Filters 38
3.2.1 The design of notch filters with active inductors 38
3.2.2 The total design with small area and low power 44
3.3 Simulation and Measured Results 44
3.3.1 Simulation and Measured Results of LNA 45
3.3.2 Simulation and Measured Results of LNA with notch filters 47
3.4 Comparison and Summary 49
Chapter 4 The Integration of Mixer and VCO with Balun 52
4.1 Circuit Design of the Mixer and VCO with Balun 52
4.1.1 Analysis of the mixer with current-bleeding method 52
4.1.2 The replacement of current source with VCO 53
4.1.3 The addition of the balun 54
4.1.4 Total design circuit 56
4.2 Simulation Results 57
4.3 Comparison and Summary 62
Chapter 5 Conclusion 63
Reference 64
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