臺灣博碩士論文加值系統

隨著可攜式電子產品蓬勃的發展，電源管理系統需要有較好的穩壓效能和較高的能量效率。電源管理系統被廣泛應用在許多方面，例如可攜式電話、行動電視、數位相機和個人數位助理…等，因此，如何有效使用和分配電池有限能量是電源管理系統重要的課題。可攜式產品通常需要使用電源管理系統控制不同功能單元的驅動使得系統能正常且有效率的工作，對於電源管理系統來說，低壓降線性穩壓器是低雜訊，低複雜度，且便宜的應用單元。
近年來，對於高效能低壓降線性穩壓器的需求，日與劇增，例如高的負載調節率、低的功率消耗和高的電源拒斥比…等。因此，可攜式產品現今正面臨關鍵的問題，由於傳統的低壓降線性穩壓器並不能同時達到在負載變動時有快速的負載暫態響應和低的功率消耗。然而，不管多快的負載暫態響應可以達到，低壓降線性穩壓器都不能有不穩定的狀態，換句話說，低壓降線性穩壓器必須能夠穩定在所有負載條件下，這通常需要用頻率補償的方式來克服。
本論文將提出一個新的頻率補償方式，能夠將此快速負載暫態響應的低壓降線性穩壓器穩定，使用TSMC 0.35um2P4M的製程。此低壓降線性穩壓器具有適應性偏壓電流的架構，可以有效的到達快速負載暫態響應，其利用超級電流鏡電路來完成，使得負載電流從輕載變重載的暫態穩定時間少於1us。然而，此低壓降線性穩壓器會遭遇到穩定度問題，利用本論文提出的頻率補償方式可以使此低壓降線性穩壓器穩定。

With the growing demand for portable devices, power management systems need to have better regulating performance and higher energy efficiency. Power management systems are used in many applications such as cellular phones, mobile TV, camera recorder and PDAs, etc. Therefore, how to use the battery energy efficiently is the most concerned problem. Portable applications often need multiple voltages controlled by a power management IC to power up many functional blocks. For power management system, Compare with the switching regulators, low-dropout linear regulator (LDO) is less noisy, less complex, and cheaper.
In recent years, the demanding for high performance linear regulator is getting increasing, such as high load regulation, low power consumption and high power supply rejection, etc. The critical problem in modern portable applications is that the conventional low-dropout regulator can’t reach both the high-speed load transient response for load variation and low power consumption. Furthermore, no matter how fast the load transient response, the low-dropout regulator can’t fall to unstable state. In other words, the low-dropout regulator has to be stable for all load conditions and frequency compensation is usually needed to stabilize the regulator loop.
A frequency compensation method for low-voltage fast transient-response low-dropout regulator using TSMC 0.35um2P4M CMOS process is presented in this paper. It features a current-efficient adaptively biased regulation scheme using a low-voltage high speed super current mirror (SCM). This low-dropout regulator can achieve fast transient-response and the settling time is less than 1us from light to heavy load. However, this low-dropout regulator has a stability problem. By using this frequency compensation method, the loop can be stable for all load conditions.

第一章 1
緒論 1
1.1 電源管理系統 1
1.2 功率積體電路之概述 2
1.2.1 切換式電容轉換器 (Charge Pump) 3
1.2.2 切換式轉換器 (Switch Converter) 4
1.2.3 線性穩壓器 (Linear Regulator) 5
1.2.4 總結 6
1.3 線性穩壓器的應用 7
1.4 研究目的和動機 9
1.5 論文組織 9
第二章 11
基本的低壓降線性穩壓器 11
2.1 低壓降線性穩壓器之重要定義 11
2.1.1 輸出電壓差 (Dropout Voltage) 12
2.1.2 靜態電流 (Quiescent Current) 13
2.1.3 效率 (Efficiency) 14
2.1.4 暫態響應 (Transient Response) 14
2.1.5 負載調節率 (Load Regulation) 18
2.1.6 線性調節率 (Line Regulation) 19
2.1.7 電源拒斥比 (PSRR) 20
2.1.8 精確度 (Accuracy) 22
2.2 傳統的低壓降線性穩壓器 22
2.2.1 開關元件 23
2.2.2 傳統的低壓降線性穩壓器 25
2.2.3 等效串聯電阻的穩定範圍 28
第三章 31
目前低壓降線性穩壓器的發展 31
3.1 其他頻率補償的方式 31
3.1.1 主極點補償 32
3.1.2 加入緩衝器補償 33
3.2 多級架構的低壓降線性穩壓器 34
3.2.1 高電源拒斥比的低壓降線性穩壓器 35
3.2.2 無外接電容的低壓降線性穩壓器 38
3.2.3 快速暫態響應的低壓降線性穩壓器 41
第四章 45
超級電流鏡用於低壓降線性穩壓器 45
4.1 超級電流鏡用於低壓降線性穩壓器 45
4.1.1 快速暫態響應的設計方式 46
4.1.2 超級電流鏡的設計 49
4.1.3 超級電流鏡應用於低壓降線性穩壓器 51
4.2 提出的頻率補償方式 54
4.2.1 頻率響應分析 54
4.2.2 提出的頻率補償方式 58
4.3 帶差參考電路 61
4.4 模擬結果 65
第五章 69
結論與未來展望 69
5.1 結論 69
5.2 未來展望 71
附錄 73
參考文獻 75

[1] Y. H. Lam and W. H. Ki, “A 0.9V 0.35μm Adaptively Biased CMOS LDO Regulator with Fast Transient Response”, IEEE International Solid-State Circuits Conference, Feb. 2008.
[2] H. C. Yang and K. H. Chen, “Current Feedback Compensation (CFC) Technique for Adaptively the Phase Margin in Capacitor-Free Regulators”, IEEE Int’l Midwest Symposium on Circuits and Systems, Aug. 2008.
[3] B. M. King, “Understanding the Load-Transient Response of LDOs”, Texas Instruments Analog Application Journal, Nov 2000, pp. 19-21.
[4] K. Wong and D. Evans, “A 150mA Low Noise, High PSRR Low-Dropout Linear Regulator in 0.13μm Technology for RF SOC Applications”, European Solid-State Circuits Conference, Sept. 2006, pp. 532-535.
[5] K. N. Leung and P. K. T. Mok, “A Capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation”, IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1691-1702, Oct. 2003.
[6] C. W. Lin and Y. J. Liu, “A Power Efficient and Fast Transient Response Low Drop-Out Regulator in Standard CMOS Process”, IEEE International Symposium on VLSI Design, Automation and Test, April. 2006.
[7] S. Heng and C. K. Pham, “Quick Response Circuit for Low-Power LDO Voltage Regulators to improve Load Transient Response”, IEEE International Symposium on Communications and Information Technologies, Oct. 2007.
[8] S. K. Lau, P. K. T. Mok and K. N. Leung, “A Low-Dropout Regulator for SOC with Q-reduction”, IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 658-664, Mar. 2007.
[9] B. Razavi, “Design of Analog CMOS Integrated Circuits”, Boston, MA: McGraw Hill, 2001.
[10] P. E. Allen and D. R. Holberg, “CMOS Analog Circuit Design, 2nd ed.”, OXFORD.
[11] K. N. Leung, P. K. T. Mok and S. K. Lau, “A low-voltage CMOS low dropout regulator with enhanced loop response”, IEEE International Symposium on Circuits and Systems, vol. 1, pp. 385-388, May 2004.
[12] K. C. Kwok and P. K. T. Mok, “Pole-Zero Tracking Frequency Compensation for Low Dropout Regulator”, IEEE International Symposium on Circuits and Systems, vol. 4, pp. 735-738, May 2002.
[13] G. A. Rincon-Mora, “Active capacitor multiplier in miller-compensated circuits”, IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 26-32, Jan. 2000.
[14] G. A. Rincon-Mora, “Current Efficient, Low Voltage, Low Drop-Out Regulators”, Georgia Institute of Technology, Ph.D Thesis, Nov. 1996.
[15] G. A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, low drop-out regulator”, IEEE J. Solid-State Circuits, vol. 33, pp. 36-44, Jan. 1998.
[16] W. Chen, W. Ki and P. K. T. Mok, “Dual-Loop Feedback for Fast Low Dropout Regulators”, IEEE Powel Electronics Specialists Conference, vol. 3, pp. 1265-1269, Jun. 2001.
[17] S. K. Lau, K. N. Leung and P. K. T. Mok, “Analysis of low-dropout regulator topologies for low-voltage regulation”, IEEE Conference Electron Devices and Solid-State Circuits, pp. 379-382, Dec. 2003.
[18] K. N. Leung and P. K. T. Mok, “Nested Miller compensation in low power CMOS design”, IEEE Trans. Circuits Syst. II: Analog Signal Process, vol. 48, no. 4, pp. 388-394, Apr. 2001.
[19] K. N. Leung and P. K. T. Mok, “Analysis of multi-stage amplifier—frequency compensation”, IEEE Trans. Circuits Syst. I: Analog Signal Process, vol. 48, no. 9, pp. 1041-1056, Sept. 2001.
[20] X. Fan, C. Misgra and E. Sanchez-Sinencio, “Single Miller Capacitor Frequency Compensation Technique for Low-Power Multistage Amplifiers”, IEEE J. Solid-State Circuits, vol. 40, no. 3, March 2005.
[21] K. N. Leung, P. K. T. Mok, W. H. Ki and J. K. O. Sin, “Three-stage large capacitive load amplifier with damping-factor-control frequency compensation”, IEEE J. Solid-State Circuits, vol. 35, pp. 221-230, Feb. 2000.
[22] H. Lee and P. K. T. Mok, “Active-feedback frequency compensation technique for low power multistage amplifiers”, IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 511-520, Mar. 2003.
[23] X. H. Peng and W. Sansen, “Transconductance with capacitances feedback compensation for multistage amplifiers”, IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1514-1520, July 2005.
[24] B. Song and P. R. Gray, “A precision curvature-compensated CMOS bandgap reference”, IEEE J. Solid-State Circuits, vol. 18, pp. 634-643, Dec. 1983.
[25] K. N. Leung, P. K. T. Mok and C. Y. Leung, “A 2-V 23-μA 5.3-ppm/oC curvature-compensated CMOS bandgap voltage reference”, IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 561-564, Mar. 2003.
[26] K. N. Leung and P. K. T. Mok, “A sub-1 V 15 ppm/oC CMOS Bandgap Voltage Reference without requiring Low Threshold Voltage Device”, IEEE J. Solid-State Circuits, vol. 37, pp. 526-530, Apr. 2002.
[27] G. A. Rincon-Mora and P. E. Allen, “A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference”, IEEE J. Solid-State Circuits, vol. 33, pp. 1551-1554, Oct. 1998.
[28] S. K. Hoon, J. Chen and F. Maloberti, “An improved bandgap reference with high power supply rejection”, Circuits and Systems, IEEE International Symposium on Circuits and Systems, vol. 5, pp. 883-836, May 2002.