臺灣博碩士論文加值系統

本論文提出一使用穿戴式紡織電極的即時心率估計系統。由於心電圖訊號的量測容易受到受測者穿戴時因呼吸或走動所造成的干擾影響，致使訊號品質嚴重衰減，因此所量測到的訊號經類比至數位轉換後的處理，實為我們是否能有效應用的關鍵。為此，我們提出了子空間追蹤方法以追蹤並消除基線電位的影響，然後加以絕對值的運算以符合後續方法的需要，接著使用自我相關度的估計方法來估測心率。為了達到能即時估計心率的需求，我們從 Power Method 發展出適應性子空間追蹤技術，並應用快速傅立葉轉換(FFT)來實現即時心率估計的相關分析。在硬體實現方面，前端類比電路為執行心電圖訊號的擷取、雜訊濾除及放大，並透過類比至數位的轉換將心電圖送入FPGA 作進一步的處理與分析。為了提高未來所設計出之硬體的運用彈性，我們將整體心電圖數位訊號處理的部分大致區分為幾個模組，以IP
(Intellectual Property) 的概念來作設計，之後利用簡單的控制電路予以整合，最後將程式碼編譯並下載至Altera EP2C35F672 Cyclone II FPGA 上以驗證我們所發展的系統。在論文最後，我們將進行實際量測以檢視此即時心率估計系統的實用性。

This thesis presents a real-time heart-rate estimation system for wearable textile sensors. The ECG signals measured from wearable dry electrodes are easily affected by
interference generated from the electrode-skin interface such that the signal quality may degrade dramatically. To conquer these obstacles, in the proposed heart-rate estimator we first derive the subspace approach for the removal of baseline wander, then use a simple absolute operation for the demand of the following method, and finally apply the correlation technique for evaluating the heart rate. One indicator for signal quality is also
proposed to distinguish the reliability of the heart rate estimation. To achieve the real-time requirement, we develop a simple adaptive algorithm from the numerical power method to realize the subspace technique and apply the fast Fourier transform (FFT) technique for the realization of the correlation method such that the estimator can be implemented using a field programmable gate array (FPGA). In the hardware implementation, analog front-end circuits are incorporated with a printed circuit board for signal amplification, filtering and an analog-to-digital converter. The ECG data are transmitted to an FPGA to operate further signal processing and the heart rate estimation. The whole proposed estimator is separated roughly into several basic modules. All of them are designed in the form of intellectual property (IP) for the reusable flexibility. The estimator can be easily realized by connecting these basic modules. The resulting codes are compiled and downloaded to the Altera EP2C35F672 Cyclone II FPGA device for fast verification. Experimental results for ECG signals measured in practice demonstrate the feasibility of the presented real-time heart-rate estimation
system for wearable textile sensors.

Abstract in Chinese . . . . . . . . . . . . . . . . . . . ii
Abstract in English . . . . . . . . . . . . . . . . . . iii
Acknowledgement . . . . . . . . . . . . . . . . . . . . . v
Contents . . . . . . . . . . . . . . . . . . . . . . . . vi
List of Tables . . . . . . . . . . . . . . . . . . . . viii
List of Figures . . . . . . . . . . . . . . . . . . . . . ix

1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . 1
1.2 Background and Motivation . . . . . . . . . . . . . . 2
1.3 Organization of the Thesis . . . . . . . . . . . . . . 3

2 BACKGROUND . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Introduction to Electrocardiogram (ECG) . . . . . . . 5
2.2 Biopotential Electrodes . . . . . . . . . . . . . . . 9
2.3 Problems Frequently Encountered . . . . . . . . . . . 10

3 THE REAL-TIME HEART-RATE ESTIMATOR . . . . . . . . . . 12
3.1 Adaptive Subspace Technique for Baseline Wander
Removal . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Correlation Technique for Heart Rate Estimation . . . 15
3.3 Experiments . . . . . . . . . . . . . . . . . . . . . 17

4 HARDWARE IMPLEMENTATION . . . . . . . . . . . . . . . . 21
4.1 Hardware Architecture Design . . . . . . . . . . . . 21
4.2 Analog Circuit Design . . . . . . . . . . . . . . . . 22
4.2.1 Pre-Amplifier . . . . . . . . . . . . . . . . . . . 24
4.2.2 Notch Filter Circuit . . . . . . . . . . . . . . . 24
4.2.3 Lowpass Filter Circuit . . . . . . . . . . . . . . 25
4.2.4 Highpass Filter Circuit . . . . . . . . . . . . . . 26
4.2.5 Output Stage Amplifier . . . . . . . . . . . . . . 26
4.3 Analog-to-Digital Converter . . . . . . . . . . . . . 28

5 FPGA IMPLEMENTATION AND EXPERIMENTAL RESULTS . . . . . 30
5.1 Introduction to FPGA Systems . . . . . . . . . . . . 31
5.2 Modular Design of the Real-Time Heart-Rate Estimator 32
5.2.1 A/D Converter Control Module . . . . . . . . . . . 33
5.2.2 Baseline Wander Removal Module . . . . . . . . . . 34
5.2.3 Heart Rate Estimation Module . . . . . . . . . . . 38
5.2.4 LCD Control Module . . . . . . . . . . . . . . . . 46
5.2.5 Seven-Segment Display Control Module . . . . . . . 47
5.2.6 Module Consolidation . . . . . . . . . . . . . . . 49
5.3 Experimental Results . . . . . . . . . . . . . . . . 49

6 CONCLUSION AND FUTUREWORK . . . . . . . . . . . . . . . 52

Bibliography . . . . . . . . . . . . . . . . . . . . . . 54

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