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研究生:劉伯俊
研究生(外文):Po-Chun, Liu
論文名稱:底膠填充於金對金覆晶接合高頻元件封裝可靠度影響之研究
論文名稱(外文):Effects of Underfills on Gold-to-Gold Reliability for High Frequency Flip-Chip Packaging
指導教授:張翼張翼引用關係
指導教授(外文):Yi, Chang
學位類別:碩士
校院名稱:國立交通大學
系所名稱:工學院碩士在職專班半導體材料與製程設備組
學門:工程學門
學類:材料工程學類
論文種類:學術論文
畢業學年度:96
語文別:中文
論文頁數:49
中文關鍵詞:高頻元件覆晶金對金底膠填充可靠度
外文關鍵詞:High frequency deviceFlip-ChipGold-to-GoldUnderfillReliability
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由於近來行動通訊品質的提高,通訊頻寬的需求量大增,衍生而出許多的通訊規格,例如:GPRS、3G、Bluetooth、802.11n…等,且於終端的使用者對於產品之輕、薄、短、小、久(產品可靠度)的要求越來越重視,所以使射頻積體電路封裝技術的挑戰越來越大。封裝對元件的功能主要在於傳遞電源能量及電路訊號、保護元件結構、提供散熱管道,其中又以電能、電訊的傳輸為射頻積體電路相當重要的考量。由於射頻電路工作頻率相當高,其原有的低頻電路特性則因頻率的增加而有所改變,以簡單的單一導線為例,原為傳輸訊號導通與不導通的判定,隨著工作頻率的提升其寄生電感(Parasitic Inductance)、肌膚效應(Skin Effect)及寄生電阻(Parasitic Resistance) …等現象。但是利用覆晶的方式連結射頻積體電路與基板,其覆晶接合封裝的單晶微波積體電路與裸晶的電性表現幾乎相同,固有許多研究單位投入覆晶封裝技術。
本論文研究方向是針對Gold-to-Gold之覆晶封裝高頻元件,做高頻特性、可靠度及機械強度之試驗,並且分析各種不同條件下,特性之變化。
As the proliferation of high-quality mobile communication increased recently, the demand of large bandwidth of communication increased recently, too. As a result, several communication specifications was developed, such as GPRS、3G、Bluetooth、802.11n…etc. Furthermore, miniature and durable portable products are more and more valued by ender users. The challenge of high frequency package is more and more tough. The main functions of package are Power Distribution、Signal Distribution、Protection and Heat Dissipation. The most important function of them is Signal Distribution. Due to the high work frequency of high frequency device, the alterations of frequency have modified the characteristic of normal device. The statuses including Parasitical Inductance、Skin Effect、Parasitical Resistance are different in different working frequency devices. With the application of utilizing the Flip-Chip package to connect the high frequency device and substrate, this joint development represents the almost same result of Power Distribution in SOT and Die. Therefore, the result attracts a lot of research units to develop and study the tech of Flip-Chip package.
The thesis directions are to test the Gold-to-Gold Flip-Chip package of high frequency devices in the first section. The tests include high frequency property、reliability、and mechanical test. In the second section, are to analyze the variations of property in different conditions.
中文摘要………………………………………………………………Ⅰ
英文摘要………………………………………………………………Ⅲ
誌謝……………………………………………………………………Ⅴ
目錄……………………………………………………………………Ⅵ
表目錄…………………………………………………………………Ⅷ
圖目錄…………………………………………………………………Ⅸ
一、緒論………………………………………………………………1
1.1前言…………………………………………………………………1
1.2研究動機與目的……………………………………………………2
二、Introduction………………………………………………………3
2.1 Chip-level interconnect techniques…………………………3
2.1.1 打線接合(Wire bonding)…………………………………4
2.1.2 覆晶(Flip chip)…………………………………………6
2.2 Interconnections in flip-chip packaging system…………9
2.2.1 錫鉛凸塊(Solder bumps)…………………………………9
2.2.2 異方性導電膠膜(ACF)……………………………………11
2.2.3 金凸塊(Gold-to-Gold bumps)…………………………13
2.3 可靠度概論………………………………………………………15
2.3.1 瞬間故障曲線……………………………………………15
2.3.2 可靠度測試方法…………………………………………16
三、實驗步驟與分析分法……………………………………………19
3.1 實驗步驟及試片準備……………………………………………19
3.1.1 Substrate gold circuits and gold bumps …………20
3.1.2 Chip gold circuits……………………………………22
3.1.3 Flip-chip assembly……………………………………23
3.1.4 Underfilling……………………………………………25
3.2 Mechanical and reliability tests…………………………26
3.2.1 Shear force test………………………………………26
3.2.2 Thermal cycling test…………………………………28
3.2.3 吸濕測試…………………………………………………29
3.2.4 爆米花測試(Popcorn test)……………………………30
3.2.5 Electric resistance measurement…………………32
3.2.6 RF measurement…………………………………………33
四、實驗結果討論……………………………………………………35
五、結論………………………………………………………………46
六、參考文獻…………………………………………………………48
1.Takaaki Ohsaki,“Electronic Packaging in the 90s – A Perspective from Asia”
2.http://elearning.stut.edu.tw/teach/electron/coat.htm
3.L. Gehman, “Bonding Wire Microelectronics Interconnections,” IEEE Trans. On Comp.
4.陳信文、陳立軒、林永森、陳志銘,電子構裝技術與材料 P135,2004
5.Katarina Boustedt, Ericsson Microwave Systems, “GHz Flip Chip – An Overview”
6.Electrically Conductive Adhesives (ECAs):J.M.Kim et al.Journal of Electronic Materials,Vol.33(11),2004
7.Myung Jin Yim, Associate Member, IEEE, In Ho Jeong, Hyung-Kyu Choi, Jin-Sang Hwang, Jin-Yong Ahn, Woonseong Kwon, and Kyung-Wook Paik, Member, IEEE , “Flip Chip Interconnection With Anisotropic Conductive Adhesives for RF and High-Frequency Applications”
8.The process and equipment technology of thermosonic flip-chip bonding P219:徐嘉彬,劉俊賢,機械工業雜誌258期。
9.L.K.Cheah,Y.M.Tan,J.Wei and C.K.Wong, “Gold to Gold Thermosonic Flip-Chip Bonding”
10.荻本 英二,CSP技術 P146,2000
11.http://www.jedec.org/
12.http://www.eia.org/
13.Manfred Boheim, Uhland Goebel, “Low Cost Packages for Micro- and Millimeterwave Circuits”
14.Zhping Feng, Wenge Zhang, Bingzhi Su, K. C. Gupta, Fellow, IEEE, and Y. C. Lee, “RF and Mechanical Characterization of Flip-Chip Interconnects in CPW Circuits with Underfill
15.L. K. Cheah, Y. M. Tan, J. Wei and C. K. Wong, “Gold to Gold Thermosonic Flip-Chip Bonding”
16.T Braum *, K. –F. Becker, M. Koch, V. Bader, R. Aschenbrenner, H. Reichl, “High-temperature reliability of Flip Chip assemblies”
17.Zhuqing Zhang, Jicun Lu*, C.P. Wong, “A Novel Approach for Incorporating Silica Filler into No-Flow Underfill”
18.L. K. The, M. Teo, E. Anto. C. C. Wong, S. G. Mhaisalkar, P. S. Teo, and E.H. Wong, “Moisture-Induced Failure of Adhesive Flip Chip Interconnects”
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