臺灣博碩士論文加值系統

溝槽式閘極功率金氧半場效電晶體 (Trench Gate Power MOSFET)為高頻低壓的功率元件主流，就其發展藍圖而言，隨著元件密度的提升，閘極-汲極間電荷(Qgd) 會變大，使閘極的充放電速度變慢而影響元件的效能。本論文之研究主要是針對0.4微米之高密度溝槽式閘極功率金氧半場效電晶體Qgd電性參數特性的改善來做探討。我們利用PECVD-TEOS方法在溝槽底部沉積一介電質薄膜來降低高密度功率電晶體Qgd，然而傳統的PECVD的製程溫度大都介於300℃~400℃之間，在此溫度下，介電質薄膜沉積於溝槽底部及側壁的速率幾乎相同，而難以藉由後續製程將介電質薄膜留在溝槽底部。因此我們提高PECVD-TEOS的製程溫度來解決改善此一沉積現象，藉著製程條件最佳化的參數設定，有效地在將介電質薄膜沉積於溝槽式閘極功率金氧半場效電晶體的溝槽底部，成功的降低高密度元件的Qgd，並通過可靠度的測試且可量產之條件。

Trench Gate Power MOSFET is the most popular power device for high frequency and low voltage utilization. The charge from gate to drain (Qgd) will become higher while the device density increasing. This study evaluates the PECVD-TEOS oxide film deposited at trench bottom for 0.4um high density trench gate power MOSFET for device performance improvement.
As we know, the deposition temperature for general PECVD-TEOS process is between 300℃ and 400℃.Under this process temperature condition, the oxide deposition rate is almost the same for trench sidewall and trench bottom. It is hard to keep an oxide film at trench bottom during trench sidewall oxide removed process.
We propose to increase the PECVD-TEOS process temperature to improve deposition ratio of trench bottom to trench sidewall, and an optimum process flow is applied to form a thicker oxide at trench bottom for high density trench gate power MOSFET. The device demonstrates a significant reduction in Qgd, and this process flow is available for production and the products also pass the reliability test.

中文摘要 …………………………………………………………… i
英文摘要 …………………………………………………………… iii
誌謝 ………………………………………………………………… v
目錄 ……………………………………………………………… vi
表目錄 ……………………………………………………………… ix
圖目錄 ……………………………………………………………… x
第一章 緒論 ………………………………………………………… 1
1.1 功率金氧半場效電晶體介紹………………………………… 1
1.2 研究動機 …………………………………………………… 4
第二章 文獻討論 …………………………………………………… 8
2.1 功率金氧半場效電晶體的發展與應用………………………… 8
2.2 化學氣相沉積原理 …………………………………………… 9
2.3 電漿的原理與基本特性 ……………………………………… 11
2.4 電漿增強化學氣相沈積 ……………………………… 14
2.5 PECVD-TEOS製程介紹 ………………………………… 16
第三章 實驗步驟 ……………………………………………… 18
3.1 PECVD-TEOS製程條件 …………………………………… 18
3.2 元件製造流程 …………………………………………… 29
3.3 分析與量測 ……………………………………………… 35
3.3.1 場發射式掃描電子顯微鏡……………………………… 36
3.3.2 穿透式電子顯微鏡……………………………………… 37
3.3.3 閘極啟始電壓 …………………………………………… 38
3.3.4 汲極-源極崩潰電壓 …………………………………… 38
3.3.5 閘極充放電容的電荷量 ……………………………… 39
3.3.6 導通電阻 ……………………………………………… 41
第四章 結果與討論 …………………………………………… 43
4.1 閘極氧化層崩潰電壓 ……………………………………… 43
4.2 閘極充放電容的電荷量測 ………………………………… 45
4.2.1 底氧化層厚度與元件特性 …………………………… 45
4.2.2 溝渠深度與元件特性 ………………………………… 47
4.2.3 元件開關切換速度 …………………………………… 48
第五章 結論 …………………………………………………… 50
參考文獻 ………………………………………………………… 51
作者簡介 ………………………………………………………… 54

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