臺灣博碩士論文加值系統

本論文旨在以平面式的電路結構設計濾波器及濾波器所衍生的電路，如雙工器。其中平面式的結構包括微帶線結合共面波導的結構與懸浮帶線等結構。文中將利用微帶線結合共面波導結構設計體積小、通帶旁具有零點的高選擇性帶通濾波器，同時該濾波器以似集總元件的方式設計。利用此高選擇性的濾波器，可將設計在極窄頻雙工器之應用上，其操作頻帶應用於全球通訊系統(接收頻帶 1920 MHz到1980 MHz, 傳送頻帶2110 MHz到 2170 MHz)。
本論文中還提出了懸浮帶線架構的低通及高通濾波電路。然而藉由低通及高通濾波器的串連電路形式，組成一具極低損耗之超寬頻帶通濾波器。所製作之電路，其量測結果與模擬結果一致。

In this thesis, we propose a novel design of a bandpass filter using combined coplanar waveguide (CPW) and microstrip. The filter is composed of the lumped elements implemented by the CPW structure and section microstrip line. Zeros have been implanted in circuit design to reject adjacent channel interferences. This filter has acquired a very sharp rejection and consequently, a good selectivity. The stopband bandwidth is also very wide in this filter design.
A novel design of a UMTS diplexer using these filters is also presented. The diplexer is composed of two bandpass filters which termed as the transmit (Tx) and receive (Rx) filter. The filter’s characteristics are analyzed by a circuit model of the LC lumped elements which are implemented by the CPW and microstrip. A structure which providing a transmission zero is adopted in each filter to reject the signal of the other filter’s band. The two filters are connected in a parallel-cascade configuration and a microstrip is used to couple the I/O signals from/to the filters.
In order to design the bandpass filter with a better performance, The low-pass and high-pass filters is made up by suspended stripline. Furthermore, a bandpass filter covering the ultra-wideband (UWB) frequency range is formed by the combination of the low-pass filter and the high-pass filter. Measurements show a good agreement with the simulations.

中文摘要 i
ABSTRACT ii
誌謝 iii
TABLE OF CONTENTS iv
LIST OF FIGURES vii
LIST OF TABLES x
CHAPTER 1 Introduction 1
1-1 Research Motivation 1
1-2 Chapter Outline 3
CHAPTER 2 Design of Combined Coplanar Waveguide and Microstrip Bandpass Filters 6
2-1 Introduction 6
2-2 The Calculations of Lump Elements 7
2-3 Prototype of Size-Reducing Component Filter 12
2-4 Zero Implantation Design 13
CHAPTER 3 DESIGN OF UMTS DIPLEXER 22
3-1 Introduction 22
3-2 The Connecting Microstrip Line 23
3-3 Sample Results 24
CHAPTER 4 Suspended Stripline Filter Syntheses 30
4-1 Introduction 30
4-2 Suspended Stripline Structure 33
4-3 SSL Low-Pass Filters Syntheses 38
4-4 SSL High-Pass Filters Syntheses 41
4-5 SSL Ultra-Wideband Filters 43
4-6 Sample Results 44
CHAPTER 5 Conclusions 77
REFERENCES 78
VITA 83

LIST OF FIGURES
Fig. 2-1 The transmission line terminated in an arbitrary load impedance ZL 15
Fig. 2-2 The two-port network consisting of a series impedance ZL between two transmission lines 15
Fig. 2-3 The two-port network consisting of a shunt impedance ZL between two transmission lines 15
Fig. 2-4 (a) The prototype filter and (b) the equivalent lumped circuit model 16
Fig. 2-5 The simulated frequency response of the filter for Fig. 2-4 ...................17
Fig. 2-6 The size reducing design for structure of Fig. 2-4 .................18
Fig. 2-7 The comparison of the frequency responses for the structures of Figs. 1 and 3… 19
Fig. 2-8 (a) The zero-implantation filter and (b) the equivalent LC circuit model ..............20
Fig. 2-9 The simulated narrow band frequency response of the Rx-filter in Fig. 2-6..........21
Fig. 3-1 The connection configuration of the Tx- and Rx-filter for the proposed diplexer..22
Fig. 3-2 The circuit layout of the proposed diplexer ............23
Fig. 3-3 The simulated frequency response of the diplexer for Fig. 3-2 .............24
Fig. 3-4 The measured and simulated frequency responses for the diplexer........................28
Fig. 3-5 The photos of experiment circuit ......28
Fig. 4-1 The suspended stripline (a) 4-D geometry. (b) Cross section schematic................46
Fig. 4-2 The electric and magnetic field lines for SSL ............47
Fig. 4-3 The electric field lines in broadside-coupled striplines for (a) even- and (b) odd-mode excitations; pp' represents plane of symmetry .............48
Fig. 4-4 (a) Ideal and (b) practical cross section of SSL ................49
Fig. 4-5 Series reactances in SSL. (a) Inductance. (b) End-coupled capacitance. (c) apacitance formed by overlapping strips on opposite substrate sides.
(d) Interdigital apacitance. (e) Capacitance formed by additional patch on backside of the substrate ....50
Fig. 4-6 The shunt SSL reactances. (a) Capacitance. (b) Inset inductance. (c) Bend inductance ...........51
Fig. 4-7 The metal top cap for shielding of SSL. (a) Cross section. (b) Top view ........52
Fig. 4-8 The metal carrier plate for shielding of SSL. (a) Cross section. (b) Top view........53
Fig. 4-9 The cross section of practical shielding for SSL ..................54
Fig. 4-10 Photograph of shielding. (a) Metal cap and carrier plate. (b) SSL component........54
Fig. 4-11 The simulated results of the shunt SSL capacitance with varying C length............55
Fig. 4-12 The simulated results of the series SSL inductance with varying L length.............55
Fig. 4-13 The equivalent circuit model of the SSL LPF-A (C1 = C7 = 0.275 pF, C3 = C5 = 0.604 pF, L2 = L6 = 1.202 nH, and L4 = 1.41 nH) .................56
Fig. 4-14 The top and bottom layout of SSL LPF to Fig. 4-13 .................56
Fig. 4-15 The circuit model and simulated frequency responses for the filter of Figs 4-3 and 4-4 ....57
Fig. 4-16 The top and bottom layout of SSL compact LPF-A to Fig. 4-13 ...........58
Fig. 4-17 The circuit model and simulated frequency responses for the filter of Figs. 4-13 and 4-16 ...........58
Fig. 4-18 The equivalent circuit model of the type of series L first to the SSL LPF-B (L1 = L7 = 0.682 nH, L3 = L5 = 1.495 nH, C2 = C6 = 0.476 pF, C4 = 0.559 pF, and C8 = 0.14 pF) ................59
Fig. 4-19 The top and bottom layout of series L first SSL LPF to Fig. 4-16...........................59
Fig. 4-20 The circuit model and simulated frequency responses for the filter of Figs. 4-6 and 4-7 ...........60
Fig. 4-21 The top and bottom layout of SSL LPF-B ...........60
Fig. 4-22 The equivalent elements of the SSL sharp-rejection LPF ................61
Fig. 4-23 The equivalent circuit model of the SSL sharp-rejection LPF-B.............................62
Fig. 4-24 The photograph of experimental circuit in Fig. 4-22. (a) Top side. (b) Bottom side ...................62
Fig. 4-25 The simulated and measured frequency responses for the filter of Fig. 4-23..........63
Fig. 4-26 The simulated results of the series SSL capacitance with varying C length............63
Fig. 4-27 The simulated results of the shunt SSL inductance with varying L length..............64
Fig. 4-28 The equivalent circuit model of the SSL HPF (C1 = C7 =1.1204 pF, C3 = C5 = 0.5108 pF, L2 = L6 = 1.6031 nH, and L4 = 1.3669 nH) ...........64
Fig. 4-29 The top and bottom layout of SSL HPF-A to Fig. 4-27 .................65
Fig. 4-30 The photograph of experimental circuit in Fig. 4-28. (a) Top side. (b) Bottom side ..........65
Fig. 4-31 The wide band responses obtained by simulation, measurement, and circuit model for the filter of Fig. 4-29 ...............66
Fig. 4-32 The top and bottom layout of SSL HPF-B ......66
Fig. 4-33 The photograph of experimental circuit in Fig. 4-31. (a) Top side. (b) Bottom side ..............67
Fig. 4-34 The simulated and measured frequency responses for the filter of Fig. 4-22..........68
Fig. 4-35 The top and bottom layout of sharp-rejection SSL HPF..........................................69
Fig. 4-36 The equivalent circuit model of the SSL sharp-rejection HPF................................69
Fig. 4-37 The photograph of experimental circuit in Fig. 4-35. (a) Top side. (b) Bottom side ............70
Fig. 4-38 The simulated and measured frequency responses for the filter of Fig. 4-37..........70
Fig. 4-39 The top and bottom layout of sharp-rejection SSL UWB BPF................................71
Fig. 4-40 The photograph of experimental circuit in Fig. 4-34. (a) Top side. (b) Bottom side .........72
Fig. 4-41 The simulated and measured frequency responses for the filter of Fig. 4-40..........72
Fig. 4-42 The measured group delay for the filter of Fig. 4-35 ..................73
Fig. 4-43 The top and bottom layout of wide-stop-band SSL UWB BPF .............73
Fig. 4-44 The simulated and measured frequency responses for the filter of Fig. 4-38..........74
Fig. 4-45 The measured group delay for the filter of Fig. 4-138 .................74
LIST OF TABLES
Table I Circuit parameters for diplexer……………… 28
Table II Circuit parameters for the second-order CPW BPF. ……… 74
Table III Circuit parameters for the basic SSL HPF …… 74
Table IV CIRCUIT PARAMETERS FOR THE SHARP-REJECTION SSL HPF… 75
Table V CIRCUIT PARAMETERS FOR THE SSL UWB BPF-A)……… 75
Table VI CIRCUIT PARAMETERS FOR THE SSL UWB BPF-B ………75

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